Lines Matching refs:SiS_Pr
79 InitCommonPointer(struct SiS_Private *SiS_Pr)
81 SiS_Pr->SiS_SModeIDTable = SiS_SModeIDTable;
82 SiS_Pr->SiS_StResInfo = SiS_StResInfo;
83 SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo;
84 SiS_Pr->SiS_StandTable = SiS_StandTable;
86 SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming;
87 SiS_Pr->SiS_PALTiming = SiS_PALTiming;
88 SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing;
89 SiS_Pr->SiS_HiTVSt2Timing = SiS_HiTVSt2Timing;
91 SiS_Pr->SiS_HiTVExtTiming = SiS_HiTVExtTiming;
92 SiS_Pr->SiS_HiTVGroup3Data = SiS_HiTVGroup3Data;
93 SiS_Pr->SiS_HiTVGroup3Simu = SiS_HiTVGroup3Simu;
95 SiS_Pr->SiS_HiTVTextTiming = SiS_HiTVTextTiming;
96 SiS_Pr->SiS_HiTVGroup3Text = SiS_HiTVGroup3Text;
99 SiS_Pr->SiS_StPALData = SiS_StPALData;
100 SiS_Pr->SiS_ExtPALData = SiS_ExtPALData;
101 SiS_Pr->SiS_StNTSCData = SiS_StNTSCData;
102 SiS_Pr->SiS_ExtNTSCData = SiS_ExtNTSCData;
103 SiS_Pr->SiS_St1HiTVData = SiS_StHiTVData;
104 SiS_Pr->SiS_St2HiTVData = SiS_St2HiTVData;
105 SiS_Pr->SiS_ExtHiTVData = SiS_ExtHiTVData;
106 SiS_Pr->SiS_St525iData = SiS_StNTSCData;
107 SiS_Pr->SiS_St525pData = SiS_St525pData;
108 SiS_Pr->SiS_St750pData = SiS_St750pData;
109 SiS_Pr->SiS_Ext525iData = SiS_ExtNTSCData;
110 SiS_Pr->SiS_Ext525pData = SiS_ExtNTSCData;
111 SiS_Pr->SiS_Ext750pData = SiS_Ext750pData;
113 SiS_Pr->pSiS_OutputSelect = &SiS_OutputSelect;
114 SiS_Pr->pSiS_SoftSetting = &SiS_SoftSetting;
116 SiS_Pr->SiS_LCD1280x720Data = SiS_LCD1280x720Data;
117 SiS_Pr->SiS_StLCD1280x768_2Data = SiS_StLCD1280x768_2Data;
118 SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data;
119 SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data;
120 SiS_Pr->SiS_LCD1280x800_2Data = SiS_LCD1280x800_2Data;
121 SiS_Pr->SiS_LCD1280x854Data = SiS_LCD1280x854Data;
122 SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data;
123 SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data;
124 SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data;
125 SiS_Pr->SiS_LCD1680x1050Data = SiS_LCD1680x1050Data;
126 SiS_Pr->SiS_StLCD1600x1200Data = SiS_StLCD1600x1200Data;
127 SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data;
128 SiS_Pr->SiS_NoScaleData = SiS_NoScaleData;
130 SiS_Pr->SiS_LVDS320x240Data_1 = SiS_LVDS320x240Data_1;
131 SiS_Pr->SiS_LVDS320x240Data_2 = SiS_LVDS320x240Data_2;
132 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
133 SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1;
134 SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1;
135 SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
137 SiS_Pr->SiS_LVDSCRT1320x240_1 = SiS_LVDSCRT1320x240_1;
138 SiS_Pr->SiS_LVDSCRT1320x240_2 = SiS_LVDSCRT1320x240_2;
139 SiS_Pr->SiS_LVDSCRT1320x240_2_H = SiS_LVDSCRT1320x240_2_H;
140 SiS_Pr->SiS_LVDSCRT1320x240_3 = SiS_LVDSCRT1320x240_3;
141 SiS_Pr->SiS_LVDSCRT1320x240_3_H = SiS_LVDSCRT1320x240_3_H;
142 SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
143 SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
145 SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1;
146 SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H;
147 SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2;
148 SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H;
151 SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData;
152 SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData;
154 SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */
155 SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */
161 InitTo300Pointer(struct SiS_Private *SiS_Pr)
163 InitCommonPointer(SiS_Pr);
165 SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable;
166 SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable;
167 SiS_Pr->SiS_RefIndex = SiS300_RefIndex;
168 SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table;
169 if(SiS_Pr->ChipType == SIS_300) {
170 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */
172 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */
174 SiS_Pr->SiS_VCLKData = SiS300_VCLKData;
175 SiS_Pr->SiS_VBVCLKData = (struct SiS_VBVCLKData *)SiS300_VCLKData;
177 SiS_Pr->SiS_SR15 = SiS300_SR15;
179 SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl;
180 SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl;
182 SiS_Pr->SiS_ExtLCD1024x768Data = SiS300_ExtLCD1024x768Data;
183 SiS_Pr->SiS_St2LCD1024x768Data = SiS300_St2LCD1024x768Data;
184 SiS_Pr->SiS_ExtLCD1280x1024Data = SiS300_ExtLCD1280x1024Data;
185 SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data;
187 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1;
188 SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2;
189 SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3;
191 SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData;
192 SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData;
193 SiS_Pr->SiS_CHTVUPALMData = SiS_CHTVUNTSCData; /* not supported on 300 series */
194 SiS_Pr->SiS_CHTVOPALMData = SiS_CHTVONTSCData; /* not supported on 300 series */
195 SiS_Pr->SiS_CHTVUPALNData = SiS300_CHTVUPALData; /* not supported on 300 series */
196 SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */
197 SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData;
199 SiS_Pr->SiS_LVDS848x480Data_1 = SiS300_LVDS848x480Data_1;
200 SiS_Pr->SiS_LVDS848x480Data_2 = SiS300_LVDS848x480Data_2;
201 SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS300_LVDSBARCO1024Data_1;
202 SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS300_LVDSBARCO1366Data_1;
203 SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS300_LVDSBARCO1366Data_2;
205 SiS_Pr->SiS_PanelType04_1a = SiS300_PanelType04_1a;
206 SiS_Pr->SiS_PanelType04_2a = SiS300_PanelType04_2a;
207 SiS_Pr->SiS_PanelType04_1b = SiS300_PanelType04_1b;
208 SiS_Pr->SiS_PanelType04_2b = SiS300_PanelType04_2b;
210 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC;
211 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC;
212 SiS_Pr->SiS_CHTVCRT1UPAL = SiS300_CHTVCRT1UPAL;
213 SiS_Pr->SiS_CHTVCRT1OPAL = SiS300_CHTVCRT1OPAL;
214 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS300_CHTVCRT1SOPAL;
215 SiS_Pr->SiS_CHTVReg_UNTSC = SiS300_CHTVReg_UNTSC;
216 SiS_Pr->SiS_CHTVReg_ONTSC = SiS300_CHTVReg_ONTSC;
217 SiS_Pr->SiS_CHTVReg_UPAL = SiS300_CHTVReg_UPAL;
218 SiS_Pr->SiS_CHTVReg_OPAL = SiS300_CHTVReg_OPAL;
219 SiS_Pr->SiS_CHTVReg_UPALM = SiS300_CHTVReg_UNTSC; /* not supported on 300 series */
220 SiS_Pr->SiS_CHTVReg_OPALM = SiS300_CHTVReg_ONTSC; /* not supported on 300 series */
221 SiS_Pr->SiS_CHTVReg_UPALN = SiS300_CHTVReg_UPAL; /* not supported on 300 series */
222 SiS_Pr->SiS_CHTVReg_OPALN = SiS300_CHTVReg_OPAL; /* not supported on 300 series */
223 SiS_Pr->SiS_CHTVReg_SOPAL = SiS300_CHTVReg_SOPAL;
224 SiS_Pr->SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
225 SiS_Pr->SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
226 SiS_Pr->SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
227 SiS_Pr->SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
228 SiS_Pr->SiS_CHTVVCLKUPALM = SiS300_CHTVVCLKUNTSC; /* not supported on 300 series */
229 SiS_Pr->SiS_CHTVVCLKOPALM = SiS300_CHTVVCLKONTSC; /* not supported on 300 series */
230 SiS_Pr->SiS_CHTVVCLKUPALN = SiS300_CHTVVCLKUPAL; /* not supported on 300 series */
231 SiS_Pr->SiS_CHTVVCLKOPALN = SiS300_CHTVVCLKOPAL; /* not supported on 300 series */
232 SiS_Pr->SiS_CHTVVCLKSOPAL = SiS300_CHTVVCLKSOPAL;
238 InitTo310Pointer(struct SiS_Private *SiS_Pr)
240 InitCommonPointer(SiS_Pr);
242 SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable;
243 SiS_Pr->SiS_RefIndex = SiS310_RefIndex;
244 SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table;
245 if(SiS_Pr->ChipType >= SIS_340) {
246 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_340; /* 340 + XGI */
247 } else if(SiS_Pr->ChipType >= SIS_761) {
248 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_761; /* 761 - preliminary */
249 } else if(SiS_Pr->ChipType >= SIS_760) {
250 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */
251 } else if(SiS_Pr->ChipType >= SIS_661) {
252 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */
253 } else if(SiS_Pr->ChipType == SIS_330) {
254 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */
255 } else if(SiS_Pr->ChipType > SIS_315PRO) {
256 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */
258 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */
260 if(SiS_Pr->ChipType >= SIS_340) {
261 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1_340;
263 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1;
265 SiS_Pr->SiS_VCLKData = SiS310_VCLKData;
266 SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData;
268 SiS_Pr->SiS_SR15 = SiS310_SR15;
270 SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl;
271 SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS;
273 SiS_Pr->SiS_St2LCD1024x768Data = SiS310_St2LCD1024x768Data;
274 SiS_Pr->SiS_ExtLCD1024x768Data = SiS310_ExtLCD1024x768Data;
275 SiS_Pr->SiS_St2LCD1280x1024Data = SiS310_St2LCD1280x1024Data;
276 SiS_Pr->SiS_ExtLCD1280x1024Data = SiS310_ExtLCD1280x1024Data;
278 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1;
280 SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData;
281 SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData;
282 SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData;
283 SiS_Pr->SiS_CHTVOPALMData = SiS310_CHTVOPALMData;
284 SiS_Pr->SiS_CHTVUPALNData = SiS310_CHTVUPALNData;
285 SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData;
286 SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData;
288 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
289 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
290 SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
291 SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
292 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
294 SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC;
295 SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC;
296 SiS_Pr->SiS_CHTVReg_UPAL = SiS310_CHTVReg_UPAL;
297 SiS_Pr->SiS_CHTVReg_OPAL = SiS310_CHTVReg_OPAL;
298 SiS_Pr->SiS_CHTVReg_UPALM = SiS310_CHTVReg_UPALM;
299 SiS_Pr->SiS_CHTVReg_OPALM = SiS310_CHTVReg_OPALM;
300 SiS_Pr->SiS_CHTVReg_UPALN = SiS310_CHTVReg_UPALN;
301 SiS_Pr->SiS_CHTVReg_OPALN = SiS310_CHTVReg_OPALN;
302 SiS_Pr->SiS_CHTVReg_SOPAL = SiS310_CHTVReg_OPAL;
304 SiS_Pr->SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
305 SiS_Pr->SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
306 SiS_Pr->SiS_CHTVVCLKUPAL = SiS310_CHTVVCLKUPAL;
307 SiS_Pr->SiS_CHTVVCLKOPAL = SiS310_CHTVVCLKOPAL;
308 SiS_Pr->SiS_CHTVVCLKUPALM = SiS310_CHTVVCLKUPALM;
309 SiS_Pr->SiS_CHTVVCLKOPALM = SiS310_CHTVVCLKOPALM;
310 SiS_Pr->SiS_CHTVVCLKUPALN = SiS310_CHTVVCLKUPALN;
311 SiS_Pr->SiS_CHTVVCLKOPALN = SiS310_CHTVVCLKOPALN;
312 SiS_Pr->SiS_CHTVVCLKSOPAL = SiS310_CHTVVCLKOPAL;
317 SiSInitPtr(struct SiS_Private *SiS_Pr)
319 if(SiS_Pr->ChipType < SIS_315H) {
321 InitTo300Pointer(SiS_Pr);
327 InitTo310Pointer(SiS_Pr);
964 SiS_DisplayOn(struct SiS_Private *SiS_Pr)
966 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
970 SiS_DisplayOff(struct SiS_Private *SiS_Pr)
972 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
981 SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
983 SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
984 SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
985 SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
986 SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
987 SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
988 SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
989 SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
990 SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
991 SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
992 SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
993 SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
994 SiS_Pr->SiS_P3cc = BaseAddr + 0x1c;
995 SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
996 SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
997 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
998 SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;
999 SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;
1000 SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;
1001 SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
1002 SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14;
1003 SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
1004 SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
1012 SiS_GetSysFlags(struct SiS_Private *SiS_Pr)
1018 SiS_Pr->SiS_SensibleSR11 = false;
1019 SiS_Pr->SiS_MyCR63 = 0x63;
1020 if(SiS_Pr->ChipType >= SIS_330) {
1021 SiS_Pr->SiS_MyCR63 = 0x53;
1022 if(SiS_Pr->ChipType >= SIS_661) {
1023 SiS_Pr->SiS_SensibleSR11 = true;
1029 SiS_Pr->SiS_SysFlags = 0;
1030 if(SiS_Pr->ChipType == SIS_650) {
1031 cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
1032 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
1033 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1034 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
1035 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1041 SiS_Pr->SiS_SysFlags |= SF_IsM650;
1046 SiS_Pr->SiS_SysFlags |= SF_Is651;
1052 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1054 case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
1055 case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
1056 default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1060 SiS_Pr->SiS_SysFlags |= SF_Is652;
1063 SiS_Pr->SiS_SysFlags |= SF_IsM650;
1069 if(SiS_Pr->ChipType >= SIS_760 && SiS_Pr->ChipType <= SIS_761) {
1070 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x30) {
1071 SiS_Pr->SiS_SysFlags |= SF_760LFB;
1073 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0xf0) {
1074 SiS_Pr->SiS_SysFlags |= SF_760UMA;
1084 SiSInitPCIetc(struct SiS_Private *SiS_Pr)
1086 switch(SiS_Pr->ChipType) {
1097 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1103 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
1121 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1128 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
1133 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1138 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0x60,0x40);
1152 SiSSetLVDSetc(struct SiS_Private *SiS_Pr)
1156 SiS_Pr->SiS_IF_DEF_LVDS = 0;
1157 SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
1158 SiS_Pr->SiS_IF_DEF_CH70xx = 0;
1159 SiS_Pr->SiS_IF_DEF_CONEX = 0;
1161 SiS_Pr->SiS_ChrontelInit = 0;
1163 if(SiS_Pr->ChipType == XGI_20) return;
1166 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1169 switch(SiS_Pr->ChipType) {
1174 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
1175 if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1176 if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
1179 SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
1180 SiS_Pr->SiS_IF_DEF_CH70xx = 1;
1189 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
1190 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1191 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1201 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & 0xe0) >> 5;
1202 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1203 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1204 if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */
1217 SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable)
1219 SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
1223 SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable)
1225 SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
1233 SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1236 if(SiS_Pr->UseCustomMode) {
1237 return SiS_Pr->CModeFlag;
1239 return SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1241 return SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1250 SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr)
1252 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1255 if(SiS_Pr->ChipType >= XGI_20) {
1258 } else if(SiS_Pr->ChipType >= SIS_761) {
1261 } else if(SiS_Pr->ChipType >= SIS_661) {
1290 SiSDetermineROMUsage(struct SiS_Private *SiS_Pr)
1292 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1295 SiS_Pr->SiS_UseROM = false;
1296 SiS_Pr->SiS_ROMNew = false;
1297 SiS_Pr->SiS_PWDOffset = 0;
1299 if(SiS_Pr->ChipType >= XGI_20) return;
1301 if((ROMAddr) && (SiS_Pr->UseROM)) {
1302 if(SiS_Pr->ChipType == SIS_300) {
1308 SiS_Pr->SiS_UseROM = true;
1309 } else if(SiS_Pr->ChipType < SIS_315H) {
1313 SiS_Pr->SiS_UseROM = true;
1316 SiS_Pr->SiS_UseROM = true;
1317 if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr))) {
1318 SiS_Pr->SiS_EMIOffset = 14;
1319 SiS_Pr->SiS_PWDOffset = 17;
1320 SiS_Pr->SiS661LCD2TableSize = 36;
1324 SiS_Pr->SiS661LCD2TableSize = 32;
1326 SiS_Pr->SiS661LCD2TableSize = 34;
1328 SiS_Pr->SiS661LCD2TableSize = 36;
1331 SiS_Pr->SiS661LCD2TableSize = 38; /* UMC data layout abandoned at 2.05.00 */
1332 SiS_Pr->SiS_EMIOffset = 16;
1333 SiS_Pr->SiS_PWDOffset = 19;
1346 SiS_SetSegRegLower(struct SiS_Private *SiS_Pr, unsigned short value)
1351 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0;
1353 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
1354 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0xf0;
1356 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
1360 SiS_SetSegRegUpper(struct SiS_Private *SiS_Pr, unsigned short value)
1365 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f;
1367 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
1368 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0x0f;
1370 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
1374 SiS_SetSegmentReg(struct SiS_Private *SiS_Pr, unsigned short value)
1376 SiS_SetSegRegLower(SiS_Pr, value);
1377 SiS_SetSegRegUpper(SiS_Pr, value);
1381 SiS_ResetSegmentReg(struct SiS_Private *SiS_Pr)
1383 SiS_SetSegmentReg(SiS_Pr, 0);
1387 SiS_SetSegmentRegOver(struct SiS_Private *SiS_Pr, unsigned short value)
1393 SiS_SetReg(SiS_Pr->SiS_P3c4,0x1d,temp);
1394 SiS_SetSegmentReg(SiS_Pr, value);
1398 SiS_ResetSegmentRegOver(struct SiS_Private *SiS_Pr)
1400 SiS_SetSegmentRegOver(SiS_Pr, 0);
1404 SiS_ResetSegmentRegisters(struct SiS_Private *SiS_Pr)
1406 if((IS_SIS65x) || (SiS_Pr->ChipType >= SIS_661)) {
1407 SiS_ResetSegmentReg(SiS_Pr);
1408 SiS_ResetSegmentRegOver(SiS_Pr);
1418 SiS_GetVBType(struct SiS_Private *SiS_Pr)
1423 SiS_Pr->SiS_VBType = 0;
1425 if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX))
1428 if(SiS_Pr->ChipType == XGI_20)
1431 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1436 rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01);
1439 SiS_Pr->SiS_VBType = VB_SIS302B;
1442 SiS_Pr->SiS_VBType = VB_SIS301C;
1444 SiS_Pr->SiS_VBType = VB_SIS301B;
1446 nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23);
1447 if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
1449 SiS_Pr->SiS_VBType = VB_SIS301;
1452 if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) {
1454 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39);
1455 if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV;
1456 else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */
1458 SiS_Pr->SiS_VBType = VB_SIS301LV;
1461 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV)) {
1462 p4_0f = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0f);
1463 p4_25 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x25);
1464 p4_27 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x27);
1465 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0x7f);
1466 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x25,0x08);
1467 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,0xfd);
1468 if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x08) {
1469 SiS_Pr->SiS_VBType |= VB_UMC;
1471 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x27,p4_27);
1472 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x25,p4_25);
1473 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0f,p4_0f);
1482 SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1485 unsigned short AdapterMemSize = SiS_Pr->VideoMemorySize / (1024*1024);
1486 unsigned short modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
1501 SiS_Get310DRAMType(struct SiS_Private *SiS_Pr)
1505 if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) {
1506 data = (*SiS_Pr->pSiS_SoftSetting) & 0x03;
1508 if(SiS_Pr->ChipType >= XGI_20) {
1511 } else if(SiS_Pr->ChipType >= SIS_340) {
1514 } else if(SiS_Pr->ChipType >= SIS_661) {
1515 if(SiS_Pr->SiS_ROMNew) {
1516 data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6);
1518 data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07;
1521 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07;
1523 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
1524 if(SiS_Pr->ChipType == SIS_330) {
1526 switch(SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30) {
1543 SiS_GetMCLK(struct SiS_Private *SiS_Pr)
1545 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1548 index = SiS_Get310DRAMType(SiS_Pr);
1549 if(SiS_Pr->ChipType >= SIS_661) {
1550 if(SiS_Pr->SiS_ROMNew) {
1553 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1555 return(SiS_Pr->SiS_MCLKData_1[index - 4].CLOCK);
1557 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1567 SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1569 unsigned char SISIOMEMTYPE *memaddr = SiS_Pr->VideoMemoryAddress;
1570 unsigned int memsize = SiS_Pr->VideoMemorySize;
1576 if(SiS_Pr->SiS_ModeType >= ModeEGA) {
1583 } else if(SiS_Pr->SiS_ModeType < ModeCGA) {
1596 SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
1599 unsigned char VGAINFO = SiS_Pr->SiS_VGAINFO;
1606 if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == (*ModeNo)) break;
1607 if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return false;
1624 if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo)) break;
1625 if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return false;
1637 SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
1642 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
1644 if(SiS_Pr->SiS_ModeType <= ModeEGA) index = 0x1B;
1655 SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
1657 if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
1659 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_WIDE;
1661 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_NORM;
1664 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK;
1669 SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
1671 if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
1673 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_WIDE;
1675 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_NORM;
1678 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC;
1687 SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1693 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11);
1694 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80);
1695 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1696 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55);
1697 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1698 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1);
1699 SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp);
1700 if((SiS_Pr->ChipType >= SIS_315H) ||
1701 (SiS_Pr->ChipType == SIS_300)) {
1707 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
1714 SiS_SetLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1716 if(SiS_DoLowModeTest(SiS_Pr, ModeNo)) {
1717 SiS_Pr->SiS_SetFlag |= LowModeTests;
1726 SiS_OpenCRTC(struct SiS_Private *SiS_Pr)
1729 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1730 if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20);
1731 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1733 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7);
1734 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1735 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1736 if(!SiS_Pr->SiS_ROMNew) {
1737 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
1743 SiS_CloseCRTC(struct SiS_Private *SiS_Pr)
1749 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
1752 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x51,0x1f,temp1);
1753 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x56,0xe7,temp2);
1759 SiS_HandleCRT1(struct SiS_Private *SiS_Pr)
1762 SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf);
1764 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x01)) {
1765 if((SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x0a) ||
1766 (SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x01)) {
1767 SiS_SetRegOR(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0x40);
1778 SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1787 modeflag = SiS_Pr->CModeFlag;
1789 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1791 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1804 SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1809 if(SiS_Pr->UseCustomMode) {
1810 infoflag = SiS_Pr->CInfoFlag;
1811 xres = SiS_Pr->CHDisplay;
1813 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
1814 xres = SiS_Pr->SiS_RefIndex[RRTI].XRes;
1817 colordepth = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex);
1832 SiS_SetSeqRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1837 SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03);
1840 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
1843 if((SiS_Pr->SiS_VBType & VB_SISVB) || (SiS_Pr->SiS_IF_DEF_LVDS)) {
1845 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
1846 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) SRdata |= 0x01;
1847 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) SRdata |= 0x01;
1851 SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata);
1854 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
1855 SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata);
1864 SiS_SetMiscRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1868 Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
1870 if(SiS_Pr->ChipType < SIS_661) {
1871 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
1872 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
1878 SiS_SetRegByte(SiS_Pr->SiS_P3c2,Miscdata);
1886 SiS_SetCRTCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1892 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
1895 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
1896 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
1899 if(SiS_Pr->ChipType >= SIS_661) {
1900 SiS_OpenCRTC(SiS_Pr);
1902 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
1903 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
1905 } else if( ( (SiS_Pr->ChipType == SIS_630) ||
1906 (SiS_Pr->ChipType == SIS_730) ) &&
1907 (SiS_Pr->ChipRevision >= 0x30) ) {
1908 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
1909 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
1910 SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE);
1921 SiS_SetATTRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1927 ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
1933 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
1934 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata = 0;
1936 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
1937 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
1938 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
1939 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
1943 if(SiS_Pr->ChipType >= SIS_661) {
1944 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) {
1945 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
1947 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
1948 if(SiS_Pr->ChipType >= SIS_315H) {
1951 if(SiS_Pr->SiS_VBType & VB_SIS30xB) {
1952 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
1958 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
1962 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
1963 SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */
1964 SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */
1967 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
1968 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */
1969 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */
1971 SiS_GetRegByte(SiS_Pr->SiS_P3da);
1972 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */
1973 SiS_GetRegByte(SiS_Pr->SiS_P3da);
1981 SiS_SetGRCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
1987 GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
1988 SiS_SetReg(SiS_Pr->SiS_P3ce,i,GRdata);
1991 if(SiS_Pr->SiS_ModeType > ModeVGA) {
1993 SiS_SetRegAND(SiS_Pr->SiS_P3ce,0x05,0xBF);
2002 SiS_ClearExt1Regs(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
2007 SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00);
2010 if(SiS_Pr->ChipType >= SIS_315H) {
2011 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
2014 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20);
2025 SiS_ResetCRT1VCLK(struct SiS_Private *SiS_Pr)
2027 if(SiS_Pr->ChipType >= SIS_315H) {
2028 if(SiS_Pr->ChipType < SIS_661) {
2029 if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return;
2032 if((SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
2033 (!(SiS_Pr->SiS_VBType & VB_SIS30xBLV)) ) {
2038 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x20);
2039 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B);
2040 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C);
2041 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2042 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
2043 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B);
2044 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C);
2045 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2053 SiS_SetCRT1Sync(struct SiS_Private *SiS_Pr, unsigned short RRTI)
2057 if(SiS_Pr->UseCustomMode) {
2058 sync = SiS_Pr->CInfoFlag >> 8;
2060 sync = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag >> 8;
2065 SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync);
2073 SiS_SetCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2079 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2081 if(SiS_Pr->UseCustomMode) {
2083 crt1data = &SiS_Pr->CCRT1CRTC[0];
2087 temp = SiS_GetRefCRT1CRTC(SiS_Pr, RRTI, SiS_Pr->SiS_UseWide);
2090 if((temp == 0x20) && (SiS_Pr->Alternate1600x1200)) temp = 0x57;
2092 crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0];
2097 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
2100 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2103 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2106 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2109 SiS_SetReg(SiS_Pr->SiS_P3c4,j,crt1data[i]);
2112 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,crt1data[16] & 0xE0);
2116 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
2118 if(SiS_Pr->SiS_ModeType > ModeVGA) {
2119 SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
2123 if(SiS_Pr->ChipType == XGI_20) {
2124 SiS_SetReg(SiS_Pr->SiS_P3d4,0x04,crt1data[4] - 1);
2126 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0c,0xfb);
2128 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x05,0xe0,((temp - 1) & 0x1f));
2131 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0e,0x1f,(temp << 5));
2143 SiS_SetCRT1Offset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2148 if(SiS_Pr->UseCustomMode) {
2149 infoflag = SiS_Pr->CInfoFlag;
2151 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
2154 DisplayUnit = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2157 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
2159 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,DisplayUnit & 0xFF);
2166 if(SiS_Pr->ChipType == XGI_20) {
2169 SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp);
2177 SiS_SetCRT1VCLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2182 if(SiS_Pr->UseCustomMode) {
2183 clka = SiS_Pr->CSR2B;
2184 clkb = SiS_Pr->CSR2C;
2186 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2187 if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) &&
2188 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2190 if((index == 0x21) && (SiS_Pr->Alternate1600x1200)) index = 0x72;
2191 clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A;
2192 clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B;
2194 clka = SiS_Pr->SiS_VCLKData[index].SR2B;
2195 clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
2199 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
2201 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,clka);
2202 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
2204 if(SiS_Pr->ChipType >= SIS_315H) {
2206 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01);
2207 if(SiS_Pr->ChipType == XGI_20) {
2208 unsigned short mf = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2210 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,SiS_GetReg(SiS_Pr->SiS_P3c4,0x2b));
2211 clkb = SiS_GetReg(SiS_Pr->SiS_P3c4,0x2c);
2213 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
2218 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2228 SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
2236 temp1 = temp2 = (SiS_GetReg(SiS_Pr->SiS_P3c4,0x18) & 0x62) >> 1;
2238 (*idx1) = (unsigned short)(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6) & 0x03;
2239 (*idx1) |= (unsigned short)(((SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) >> 4) & 0x0c));
2268 SiS_DoCalcDelay(struct SiS_Private *SiS_Pr, unsigned short MCLK, unsigned short VCLK,
2274 SiS_GetFIFOThresholdIndex300(SiS_Pr, &idx1, &idx2);
2288 SiS_CalcDelay(struct SiS_Private *SiS_Pr, unsigned short VCLK,
2293 temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
2294 temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
2302 SiS_SetCRT1FIFO_300(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2312 if(SiS_Pr->UseCustomMode) {
2313 VCLK = SiS_Pr->CSRClock;
2315 index = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
2316 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2320 colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
2323 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A) & 0x07;
2324 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
2326 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xc3;
2327 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,temp);
2330 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK) + 1;
2332 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
2334 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6;
2336 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,((temp - 1) << 6));
2343 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
2347 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
2350 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2355 SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
2359 SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index)
2379 if(SiS_Pr->ChipType == SIS_730) {
2387 SiS_CalcDelay2(struct SiS_Private *SiS_Pr, unsigned char key)
2391 if(SiS_Pr->ChipType == SIS_730) {
2397 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) & 0x80) index += 12;
2399 return SiS_GetLatencyFactor630(SiS_Pr, index);
2403 SiS_SetCRT1FIFO_630(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2431 if (SiS_Pr->ChipType == SIS_730)
2439 if(SiS_Pr->UseCustomMode) {
2440 VCLK = SiS_Pr->CSRClock;
2442 data = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
2443 VCLK = SiS_Pr->SiS_VCLKData[data].CLOCK;
2447 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A) & 0x07;
2448 MCLK16 = SiS_Pr->SiS_MCLKData_0[data].CLOCK * 16;
2451 colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
2454 templ = SiS_CalcDelay2(SiS_Pr, queuedata[i]) * VCLK * colorth;
2474 if(SiS_Pr->ChipType != SIS_730) i = 9;
2481 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
2484 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
2487 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2492 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
2495 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
2497 if(SiS_Pr->ChipType == SIS_730) {
2506 (SiS_Pr->ChipType == SIS_630) &&
2507 (SiS_Pr->ChipRevision >= 0x30) ) {
2515 sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ);
2516 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0);
2519 if(SiS_Pr->ChipType == SIS_730) {
2532 sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ);
2538 SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2543 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);
2545 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2547 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE);
2548 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
2550 if(SiS_Pr->ChipType >= XGI_20) {
2551 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2552 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2553 } else if(SiS_Pr->ChipType >= SIS_661) {
2555 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2556 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2560 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2561 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2573 SiS_SetVCLKState(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2579 if(SiS_Pr->UseCustomMode) {
2580 VCLK = SiS_Pr->CSRClock;
2582 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2583 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2587 if(SiS_Pr->ChipType < SIS_315H) {
2590 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
2594 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
2596 } else if(SiS_Pr->ChipType < XGI_20) {
2599 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2602 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
2608 if(SiS_Pr->ChipType == XGI_20) data &= ~0x04;
2609 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2610 if(SiS_Pr->ChipType != XGI_20) {
2611 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f) & 0xe7;
2613 SiS_SetReg(SiS_Pr->SiS_P3c4,0x1f,data);
2619 if(SiS_Pr->ChipType >= SIS_661) {
2621 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10);
2630 if(SiS_Pr->ChipType == SIS_540) {
2635 if(SiS_Pr->ChipType < SIS_315H) {
2636 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data);
2638 if(SiS_Pr->ChipType > SIS_315PRO) {
2641 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data);
2648 SiS_SetCRT1ModeRegs(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2653 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
2657 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2659 if(SiS_Pr->UseCustomMode) {
2660 infoflag = SiS_Pr->CInfoFlag;
2663 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
2668 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F);
2672 if(SiS_Pr->SiS_ModeType > ModeEGA) {
2674 data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
2678 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data);
2680 if(SiS_Pr->ChipType != SIS_300) {
2684 int hrs = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x04) |
2685 ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0xc0) << 2)) - 3;
2686 int hto = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x00) |
2687 ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0x03) << 8)) + 5;
2690 SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,data);
2691 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,((data >> 8) & 0x03));
2695 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
2700 if(SiS_Pr->ChipType == SIS_300) {
2701 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data);
2703 if(SiS_Pr->ChipType >= XGI_20) data |= 0x20;
2704 if(SiS_Pr->SiS_ModeType == ModeEGA) {
2709 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data);
2713 if(SiS_Pr->ChipType >= SIS_315H) {
2714 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
2717 if(SiS_Pr->ChipType == SIS_315PRO) {
2719 data = SiS_Pr->SiS_SR15[(2 * 4) + SiS_Get310DRAMType(SiS_Pr)];
2720 if(SiS_Pr->SiS_ModeType == ModeText) {
2723 data2 = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI) >> 1;
2725 data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
2732 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
2734 } else if((SiS_Pr->ChipType == SIS_330) || (SiS_Pr->SiS_SysFlags & SF_760LFB)) {
2736 data = SiS_Get310DRAMType(SiS_Pr);
2737 if(SiS_Pr->ChipType == SIS_330) {
2738 data = SiS_Pr->SiS_SR15[(2 * 4) + data];
2740 if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
2741 else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
2744 if(SiS_Pr->SiS_ModeType <= ModeEGA) {
2747 if(SiS_Pr->UseCustomMode) {
2748 data2 = SiS_Pr->CSRClock;
2750 data2 = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2751 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
2754 data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
2757 data2 = ((unsigned int)(SiS_GetMCLK(SiS_Pr) * 1024)) / data2;
2759 if(SiS_Pr->ChipType == SIS_330) {
2760 if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
2784 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
2792 if(SiS_Pr->SiS_ModeType != ModeText) {
2794 if(SiS_Pr->SiS_ModeType != ModeEGA) {
2798 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
2800 SiS_SetVCLKState(SiS_Pr, ModeNo, RRTI, ModeIdIndex);
2803 if(((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) ||
2804 (SiS_Pr->ChipType == XGI_40)) {
2805 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
2806 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c);
2808 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c);
2810 } else if(SiS_Pr->ChipType == XGI_20) {
2811 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
2812 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x33);
2814 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x73);
2816 SiS_SetReg(SiS_Pr->SiS_P3d4,0x51,0x02);
2823 SiS_SetupDualChip(struct SiS_Private *SiS_Pr)
2827 SISIOADDRESS P2_3c2 = SiS_Pr->IOAddress2 + 0x12;
2828 SISIOADDRESS P2_3c4 = SiS_Pr->IOAddress2 + 0x14;
2829 SISIOADDRESS P2_3ce = SiS_Pr->IOAddress2 + 0x1e;
2832 if((SiS_Pr->ChipRevision != 0) ||
2833 (!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x04)))
2837 SiS_SetReg(P2_3c4,i,SiS_GetReg(SiS_Pr->SiS_P3c4,i));
2840 SiS_SetReg(P2_3ce,i,SiS_GetReg(SiS_Pr->SiS_P3ce,i));
2843 SiS_SetReg(P2_3c4,0x06,SiS_GetReg(SiS_Pr->SiS_P3c4,0x06)); /* SR06 */
2844 SiS_SetReg(P2_3c4,0x21,SiS_GetReg(SiS_Pr->SiS_P3c4,0x21)); /* SR21 */
2845 SiS_SetRegByte(P2_3c2,SiS_GetRegByte(SiS_Pr->SiS_P3cc)); /* MISC */
2856 SiS_WriteDAC(struct SiS_Private *SiS_Pr, SISIOADDRESS DACData, unsigned short shiftflag,
2872 SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2879 data = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex) & DACInfoFlag;
2891 if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */
2892 (SiS_Pr->SiS_VBType & VB_NoLCD) ) ||
2893 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */
2894 (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */
2895 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
2896 DACAddr = SiS_Pr->SiS_P3c8;
2897 DACData = SiS_Pr->SiS_P3c9;
2900 DACAddr = SiS_Pr->SiS_Part5Port;
2901 DACData = SiS_Pr->SiS_Part5Port + 1;
2929 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[bx], table[si]);
2934 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[si], table[bx]);
2948 SiS_SetCRT1Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2952 SiS_Pr->SiS_CRT1Mode = ModeNo;
2954 StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex);
2956 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
2957 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) {
2958 SiS_DisableBridge(SiS_Pr);
2962 SiS_ResetSegmentRegisters(SiS_Pr);
2964 SiS_SetSeqRegs(SiS_Pr, StandTableIndex);
2965 SiS_SetMiscRegs(SiS_Pr, StandTableIndex);
2966 SiS_SetCRTCRegs(SiS_Pr, StandTableIndex);
2967 SiS_SetATTRegs(SiS_Pr, StandTableIndex);
2968 SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
2969 SiS_ClearExt1Regs(SiS_Pr, ModeNo);
2970 SiS_ResetCRT1VCLK(SiS_Pr);
2972 SiS_Pr->SiS_SelectCRT2Rate = 0;
2973 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
2975 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
2976 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2977 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
2981 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
2982 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
2985 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
2987 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2988 SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
2992 SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex);
2993 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2994 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2995 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2998 switch(SiS_Pr->ChipType) {
3001 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo, RefreshRateTableIndex);
3006 SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, RefreshRateTableIndex);
3011 if(SiS_Pr->ChipType == XGI_20) {
3021 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,sr2b);
3022 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,sr2c);
3023 SiS_SetRegByte(SiS_Pr->SiS_P3c2,(SiS_GetRegByte(SiS_Pr->SiS_P3cc) | 0x0c));
3026 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex);
3031 SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3034 if(SiS_Pr->ChipType == XGI_40) {
3035 SiS_SetupDualChip(SiS_Pr);
3039 SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex);
3041 if(SiS_Pr->SiS_flag_clearbuffer) {
3042 SiS_ClearBuffer(SiS_Pr, ModeNo);
3045 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) {
3046 SiS_WaitRetrace1(SiS_Pr);
3047 SiS_DisplayOn(SiS_Pr);
3056 SiS_InitVB(struct SiS_Private *SiS_Pr)
3058 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
3060 SiS_Pr->Init_P4_0E = 0;
3061 if(SiS_Pr->SiS_ROMNew) {
3062 SiS_Pr->Init_P4_0E = ROMAddr[0x82];
3063 } else if(SiS_Pr->ChipType >= XGI_40) {
3064 if(SiS_Pr->SiS_XGIROM) {
3065 SiS_Pr->Init_P4_0E = ROMAddr[0x80];
3071 SiS_ResetVB(struct SiS_Private *SiS_Pr)
3074 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
3078 if(SiS_Pr->SiS_UseROM) {
3079 if(SiS_Pr->ChipType < SIS_330) {
3081 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3082 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3083 } else if(SiS_Pr->ChipType >= SIS_661 && SiS_Pr->ChipType < XGI_20) {
3085 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3086 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3088 } else if(SiS_Pr->ChipType >= XGI_40) {
3090 if(SiS_Pr->SiS_XGIROM) temp |= ROMAddr[0x7e];
3092 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3102 SiS_StrangeStuff(struct SiS_Private *SiS_Pr)
3110 SiS_Pr->ChipType == SIS_340 ||
3111 SiS_Pr->ChipType == XGI_40) {
3112 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */
3113 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00);
3114 SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */
3115 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x30, 0xfe); /* Fiddle with video regs */
3116 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef);
3127 SiS_Handle760(struct SiS_Private *SiS_Pr)
3133 if( (SiS_Pr->ChipType != SIS_760) ||
3134 ((SiS_GetReg(SiS_Pr->SiS_P3d4, 0x5c) & 0xf8) != 0x80) ||
3135 (!(SiS_Pr->SiS_SysFlags & SF_760LFB)) ||
3136 (!(SiS_Pr->SiS_SysFlags & SF_760UMA)) )
3139 somebase = sisfb_read_mio_pci_word(SiS_Pr, 0x74);
3146 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
3155 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1);
3156 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2);
3167 SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
3169 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3174 SiS_Pr->UseCustomMode = false;
3175 SiS_Pr->CRT1UsesCustomMode = false;
3177 SiS_Pr->SiS_flag_clearbuffer = 0;
3179 if(SiS_Pr->UseCustomMode) {
3182 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
3190 SiSInitPtr(SiS_Pr);
3191 SiSRegInit(SiS_Pr, BaseAddr);
3192 SiS_GetSysFlags(SiS_Pr);
3194 SiS_Pr->SiS_VGAINFO = 0x11;
3196 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05);
3197 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3199 SiSInitPCIetc(SiS_Pr);
3200 SiSSetLVDSetc(SiS_Pr);
3201 SiSDetermineROMUsage(SiS_Pr);
3203 SiS_UnLockCRT2(SiS_Pr);
3205 if(!SiS_Pr->UseCustomMode) {
3206 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false;
3211 SiS_GetVBType(SiS_Pr);
3214 SiS_InitVB(SiS_Pr);
3215 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3216 if(SiS_Pr->ChipType >= SIS_315H) {
3217 SiS_ResetVB(SiS_Pr);
3218 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3219 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3220 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3222 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3227 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, (SiS_Pr->UseCustomMode) ? 0 : 1);
3228 SiS_SetYPbPr(SiS_Pr);
3229 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3230 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3231 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3234 if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) {
3238 SiS_OpenCRTC(SiS_Pr);
3240 if(SiS_Pr->UseCustomMode) {
3241 SiS_Pr->CRT1UsesCustomMode = true;
3242 SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
3243 SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
3245 SiS_Pr->CRT1UsesCustomMode = false;
3249 if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) ||
3250 (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) {
3251 SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
3255 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) {
3256 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3257 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3258 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3259 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3260 SiS_SetCRT2Group(SiS_Pr, RealModeNo);
3264 SiS_HandleCRT1(SiS_Pr);
3266 SiS_StrangeStuff(SiS_Pr);
3268 SiS_DisplayOn(SiS_Pr);
3269 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3272 if(SiS_Pr->ChipType >= SIS_315H) {
3273 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3274 if(!(SiS_IsDualEdge(SiS_Pr))) {
3275 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3281 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3282 if(SiS_Pr->ChipType >= SIS_315H) {
3284 if(!SiS_Pr->SiS_ROMNew) {
3285 if(SiS_IsVAMode(SiS_Pr)) {
3286 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3288 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
3292 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3294 if((IS_SIS650) && (SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0xfc)) {
3296 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
3297 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
3301 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3302 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3305 } else if((SiS_Pr->ChipType == SIS_630) ||
3306 (SiS_Pr->ChipType == SIS_730)) {
3307 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3311 SiS_CloseCRTC(SiS_Pr);
3313 SiS_Handle760(SiS_Pr);
3316 if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00);
3328 SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth)
3332 SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */
3333 SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */
3334 SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */
3335 SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */
3336 SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */
3337 SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */
3338 (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
3340 SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */
3341 SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */
3342 | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
3343 | (((SiS_Pr->CVSyncStart - x) & 0x100) >> 6)
3344 | (((SiS_Pr->CVBlankStart- 1) & 0x100) >> 5)
3346 | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4)
3347 | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
3348 | (((SiS_Pr->CVSyncStart - x) & 0x200) >> 2);
3350 SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */
3353 if(SiS_Pr->CHDisplay >= 1600) SiS_Pr->CCRT1CRTC[16] |= 0x60; /* SRE */
3354 else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40;
3357 SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart - x) & 0xFF; /* CR10 */
3358 SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd - x) & 0x0F) | 0x80; /* CR11 */
3359 SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */
3360 SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */
3361 SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */
3363 SiS_Pr->CCRT1CRTC[13] = /* SRA */
3364 GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) |
3365 GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) |
3366 GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
3367 GETBITSTR((SiS_Pr->CVSyncStart -x), 10:10, 3:3) |
3368 GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) |
3369 GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ;
3371 SiS_Pr->CCRT1CRTC[14] = /* SRB */
3372 GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) |
3373 GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) |
3374 GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
3375 GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ;
3378 SiS_Pr->CCRT1CRTC[15] = /* SRC */
3379 GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
3380 GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ;
3384 SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
3388 unsigned short VGAHDE = SiS_Pr->SiS_VGAHDE;
3392 if(SiS_Pr->SiS_LCDInfo & LCDPass11) return;
3394 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
3398 SiS_Pr->CHDisplay = VGAHDE;
3399 SiS_Pr->CHBlankStart = VGAHDE;
3401 SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE;
3402 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE;
3404 if(SiS_Pr->ChipType < SIS_315H) {
3406 tempbx = SiS_Pr->SiS_VGAHT;
3407 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3408 tempbx = SiS_Pr->PanelHT;
3416 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes;
3417 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */
3418 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3419 tempax = SiS_Pr->PanelXRes;
3425 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx;
3427 if(SiS_Pr->ChipType < SIS_315H) {
3429 if(SiS_Pr->SiS_VGAHDE == SiS_Pr->PanelXRes) {
3430 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE + ((SiS_Pr->PanelHRS + 1) & ~1);
3431 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + SiS_Pr->PanelHRE;
3433 SiS_Pr->CHSyncStart >>= 1;
3434 SiS_Pr->CHSyncEnd >>= 1;
3436 } else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3437 tempax = (SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE) >> 1;
3438 tempbx = (SiS_Pr->PanelHRS + 1) & ~1;
3443 SiS_Pr->CHSyncStart = (VGAHDE + tempax + tempbx + 7) & ~7;
3444 tempax = SiS_Pr->PanelHRE + 7;
3446 SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + tempax) & ~7;
3448 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE;
3450 SiS_Pr->CHSyncStart >>= 1;
3451 tempax = ((SiS_Pr->CHTotal - SiS_Pr->CHSyncStart) / 3) << 1;
3452 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + tempax;
3454 SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + (SiS_Pr->CHTotal / 10) + 7) & ~7;
3455 SiS_Pr->CHSyncStart += 8;
3462 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3463 tempbx = SiS_Pr->PanelXRes;
3467 tempax += SiS_Pr->PanelHRS;
3468 SiS_Pr->CHSyncStart = tempax;
3469 tempax += SiS_Pr->PanelHRE;
3470 SiS_Pr->CHSyncEnd = tempax;
3474 tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes;
3475 tempax = SiS_Pr->SiS_VGAVDE;
3476 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3477 tempax = SiS_Pr->PanelYRes;
3478 } else if(SiS_Pr->ChipType < SIS_315H) {
3481 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
3483 } else if((SiS_Pr->SiS_LCDResInfo == Panel_800x600) ||
3484 (SiS_Pr->SiS_LCDResInfo == Panel_1024x600)) {
3486 tempbx = SiS_Pr->SiS_VGAVT;
3490 SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax;
3492 tempax = SiS_Pr->SiS_VGAVDE;
3493 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3494 tempax += (SiS_Pr->PanelYRes - tempax) >> 1;
3496 tempax += SiS_Pr->PanelVRS;
3497 SiS_Pr->CVSyncStart = tempax;
3498 tempax += SiS_Pr->PanelVRE;
3499 SiS_Pr->CVSyncEnd = tempax;
3500 if(SiS_Pr->ChipType < SIS_315H) {
3501 SiS_Pr->CVSyncStart--;
3502 SiS_Pr->CVSyncEnd--;
3505 SiS_CalcCRRegisters(SiS_Pr, 8);
3506 SiS_Pr->CCRT1CRTC[15] &= ~0xF8;
3507 SiS_Pr->CCRT1CRTC[15] |= (remaining << 4);
3508 SiS_Pr->CCRT1CRTC[16] &= ~0xE0;
3510 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
3513 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
3516 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
3519 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
3522 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
3525 tempax = SiS_Pr->CCRT1CRTC[16] & 0xE0;
3526 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1F,tempax);
3528 tempax = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
3530 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax);
3535 SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata,