Lines Matching defs:par
92 r = VGArCR(chan->reg, chan->par);
100 VGAwCR(chan->reg, r, chan->par);
108 r = VGArCR(chan->reg, chan->par);
116 VGAwCR(chan->reg, r, chan->par);
123 return (VGArCR(chan->reg, chan->par) & PROSAVAGE_I2C_SCL_IN) ? 1 : 0;
130 return (VGArCR(chan->reg, chan->par) & PROSAVAGE_I2C_SDA_IN) ? 1 : 0;
138 if (chan->par) {
142 chan->adapter.dev.parent = &chan->par->pcidev->dev;
157 dev_dbg(&chan->par->pcidev->dev,
160 dev_warn(&chan->par->pcidev->dev,
169 struct savagefb_par *par = info->par;
170 par->chan.par = par;
172 switch (par->chip) {
176 par->chan.reg = CR_SERIAL2;
177 par->chan.ioaddr = par->mmio.vbase;
178 par->chan.algo.setsda = prosavage_gpio_setsda;
179 par->chan.algo.setscl = prosavage_gpio_setscl;
180 par->chan.algo.getsda = prosavage_gpio_getsda;
181 par->chan.algo.getscl = prosavage_gpio_getscl;
184 par->chan.reg = CR_SERIAL1;
185 if (par->pcidev->revision > 1 && !(VGArCR(0xa6, par) & 0x40))
186 par->chan.reg = CR_SERIAL2;
187 par->chan.ioaddr = par->mmio.vbase;
188 par->chan.algo.setsda = prosavage_gpio_setsda;
189 par->chan.algo.setscl = prosavage_gpio_setscl;
190 par->chan.algo.getsda = prosavage_gpio_getsda;
191 par->chan.algo.getscl = prosavage_gpio_getscl;
194 par->chan.reg = MM_SERIAL1;
195 par->chan.ioaddr = par->mmio.vbase;
196 par->chan.algo.setsda = savage4_gpio_setsda;
197 par->chan.algo.setscl = savage4_gpio_setscl;
198 par->chan.algo.getsda = savage4_gpio_getsda;
199 par->chan.algo.getscl = savage4_gpio_getscl;
202 par->chan.par = NULL;
205 savage_setup_i2c_bus(&par->chan, "SAVAGE DDC2");
210 struct savagefb_par *par = info->par;
212 if (par->chan.par)
213 i2c_del_adapter(&par->chan.adapter);
215 par->chan.par = NULL;
220 struct savagefb_par *par = info->par;
223 if (par->chan.par)
224 edid = fb_ddc_read(&par->chan.adapter);