Lines Matching defs:sfb
244 struct s3c_fb *sfb = win->parent;
246 dev_dbg(sfb->dev, "checking parameters\n");
252 dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n",
266 if (sfb->variant.palette[win->index] != 0) {
329 dev_err(sfb->dev, "invalid bpp\n");
333 dev_dbg(sfb->dev, "%s: verified parameters\n", __func__);
339 * @sfb: The hardware state.
345 static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
351 if (sfb->variant.has_clksel)
352 clk = clk_get_rate(sfb->bus_clk);
354 clk = clk_get_rate(sfb->lcd_clk);
362 dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
395 struct s3c_fb *sfb = win->parent;
399 writel(size, sfb->regs + OSD_BASE(win->index, sfb->variant)
411 struct s3c_fb *sfb = win->parent;
414 writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));
425 struct s3c_fb *sfb = win->parent;
429 if (sfb->variant.has_prtcon) {
430 writel(PRTCON_PROTECT, sfb->regs + PRTCON);
431 } else if (sfb->variant.has_shadowcon) {
432 reg = readl(sfb->regs + SHADOWCON);
434 sfb->regs + SHADOWCON);
437 if (sfb->variant.has_prtcon) {
438 writel(0, sfb->regs + PRTCON);
439 } else if (sfb->variant.has_shadowcon) {
440 reg = readl(sfb->regs + SHADOWCON);
442 sfb->regs + SHADOWCON);
449 * @sfb: The main framebuffer state.
452 static void s3c_fb_enable(struct s3c_fb *sfb, int enable)
454 u32 vidcon0 = readl(sfb->regs + VIDCON0);
456 if (enable && !sfb->output_on)
457 pm_runtime_get_sync(sfb->dev);
472 writel(vidcon0, sfb->regs + VIDCON0);
474 if (!enable && sfb->output_on)
475 pm_runtime_put_sync(sfb->dev);
477 sfb->output_on = enable;
490 struct s3c_fb *sfb = win->parent;
491 void __iomem *regs = sfb->regs;
498 dev_dbg(sfb->dev, "setting framebuffer parameters\n");
500 pm_runtime_get_sync(sfb->dev);
533 if (!sfb->output_on)
534 s3c_fb_enable(sfb, 1);
541 writel(info->fix.smem_start, buf + sfb->variant.buf_start);
544 writel(data, buf + sfb->variant.buf_end);
551 writel(data, regs + sfb->variant.buf_size + (win_no * 4));
557 writel(data, regs + VIDOSD_A(win_no, sfb->variant));
566 writel(data, regs + VIDOSD_B(win_no, sfb->variant));
578 if (sfb->variant.has_shadowcon) {
579 data = readl(sfb->regs + SHADOWCON);
581 writel(data, sfb->regs + SHADOWCON);
585 sfb->enabled |= (1 << win->index);
648 void __iomem *keycon = regs + sfb->variant.keycon;
662 writel(data, regs + sfb->variant.wincon + (win_no * 4));
663 writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
666 if (sfb->variant.has_blendcon) {
667 data = readl(sfb->regs + BLENDCON);
673 writel(data, sfb->regs + BLENDCON);
678 pm_runtime_put_sync(sfb->dev);
685 * @sfb: The hardware information.
697 static void s3c_fb_update_palette(struct s3c_fb *sfb,
705 palreg = sfb->regs + sfb->variant.palette[win->index];
707 dev_dbg(sfb->dev, "%s: win %d, reg %d (%p): %08x\n",
712 palcon = readl(sfb->regs + WPALCON);
713 writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
720 writel(palcon, sfb->regs + WPALCON);
745 struct s3c_fb *sfb = win->parent;
748 dev_dbg(sfb->dev, "%s: win %d: %d => rgb=%d/%d/%d\n",
751 pm_runtime_get_sync(sfb->dev);
774 s3c_fb_update_palette(sfb, win, regno, val);
780 pm_runtime_put_sync(sfb->dev);
784 pm_runtime_put_sync(sfb->dev);
798 struct s3c_fb *sfb = win->parent;
801 u32 output_on = sfb->output_on;
803 dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
805 pm_runtime_get_sync(sfb->dev);
807 wincon = readl(sfb->regs + sfb->variant.wincon + (index * 4));
812 sfb->enabled &= ~(1 << index);
819 sfb->regs + sfb->variant.winmap + (index * 4));
825 writel(0x0, sfb->regs + sfb->variant.winmap + (index * 4));
828 sfb->enabled |= (1 << index);
834 pm_runtime_put_sync(sfb->dev);
839 writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
846 s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
849 pm_runtime_put_sync(sfb->dev);
851 return output_on == sfb->output_on;
869 struct s3c_fb *sfb = win->parent;
870 void __iomem *buf = sfb->regs + win->index * 8;
873 pm_runtime_get_sync(sfb->dev);
892 dev_err(sfb->dev, "invalid bpp\n");
893 pm_runtime_put_sync(sfb->dev);
904 writel(info->fix.smem_start + start_boff, buf + sfb->variant.buf_start);
905 writel(info->fix.smem_start + end_boff, buf + sfb->variant.buf_end);
909 pm_runtime_put_sync(sfb->dev);
915 * @sfb: main hardware state
917 static void s3c_fb_enable_irq(struct s3c_fb *sfb)
919 void __iomem *regs = sfb->regs;
922 if (!test_and_set_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
940 * @sfb: main hardware state
942 static void s3c_fb_disable_irq(struct s3c_fb *sfb)
944 void __iomem *regs = sfb->regs;
947 if (test_and_clear_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
960 struct s3c_fb *sfb = dev_id;
961 void __iomem *regs = sfb->regs;
964 spin_lock(&sfb->slock);
973 sfb->vsync_info.count++;
974 wake_up_interruptible(&sfb->vsync_info.wait);
980 s3c_fb_disable_irq(sfb);
982 spin_unlock(&sfb->slock);
988 * @sfb: main hardware state
991 static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc)
999 pm_runtime_get_sync(sfb->dev);
1001 count = sfb->vsync_info.count;
1002 s3c_fb_enable_irq(sfb);
1003 ret = wait_event_interruptible_timeout(sfb->vsync_info.wait,
1004 count != sfb->vsync_info.count,
1007 pm_runtime_put_sync(sfb->dev);
1019 struct s3c_fb *sfb = win->parent;
1030 ret = s3c_fb_wait_for_vsync(sfb, crtc);
1074 * @sfb: The base resources for the hardware.
1079 static int s3c_fb_alloc_memory(struct s3c_fb *sfb, struct s3c_fb_win *win)
1086 dev_dbg(sfb->dev, "allocating memory for display\n");
1091 dev_dbg(sfb->dev, "real_size=%u (%u.%u), virt_size=%u (%u.%u)\n",
1102 dev_dbg(sfb->dev, "want %u bytes for window\n", size);
1104 fbi->screen_buffer = dma_alloc_wc(sfb->dev, size, &map_dma, GFP_KERNEL);
1108 dev_dbg(sfb->dev, "mapped %x to %p\n",
1119 * @sfb: The base resources for the hardware.
1124 static void s3c_fb_free_memory(struct s3c_fb *sfb, struct s3c_fb_win *win)
1129 dma_free_wc(sfb->dev, PAGE_ALIGN(fbi->fix.smem_len),
1135 * @sfb: The base resources for the hardware.
1141 static void s3c_fb_release_win(struct s3c_fb *sfb, struct s3c_fb_win *win)
1146 if (sfb->variant.has_shadowcon) {
1147 data = readl(sfb->regs + SHADOWCON);
1150 writel(data, sfb->regs + SHADOWCON);
1155 s3c_fb_free_memory(sfb, win);
1162 * @sfb: The base resources for the hardware
1170 static int s3c_fb_probe_win(struct s3c_fb *sfb, unsigned int win_no,
1181 dev_dbg(sfb->dev, "probing window %d, variant %p\n", win_no, variant);
1183 init_waitqueue_head(&sfb->vsync_info.wait);
1188 palette_size * sizeof(u32), sfb->dev);
1192 windata = sfb->pdata->win[win_no];
1193 initmode = *sfb->pdata->vtiming;
1203 win->parent = sfb;
1208 ret = s3c_fb_alloc_memory(sfb, win);
1210 dev_err(sfb->dev, "failed to allocate display memory\n");
1251 dev_err(sfb->dev, "check_var failed on initial video params\n");
1261 dev_err(sfb->dev, "failed to allocate fb cmap\n");
1265 dev_dbg(sfb->dev, "about to register framebuffer\n");
1271 dev_err(sfb->dev, "failed to register framebuffer\n");
1275 dev_info(sfb->dev, "window %d: fb %s\n", win_no, fbinfo->fix.id);
1282 * @sfb: The base resources for the hardware.
1286 static void s3c_fb_set_rgb_timing(struct s3c_fb *sfb)
1288 struct fb_videomode *vmode = sfb->pdata->vtiming;
1289 void __iomem *regs = sfb->regs;
1296 clkdiv = s3c_fb_calc_pixclk(sfb, vmode->pixclock);
1298 data = sfb->pdata->vidcon0;
1306 if (sfb->variant.is_2443)
1313 writel(data, regs + sfb->variant.vidtcon);
1318 writel(data, regs + sfb->variant.vidtcon + 4);
1324 writel(data, regs + sfb->variant.vidtcon + 8);
1329 * @sfb: The base resources for the hardware.
1334 static void s3c_fb_clear_win(struct s3c_fb *sfb, int win)
1336 void __iomem *regs = sfb->regs;
1339 writel(0, regs + sfb->variant.wincon + (win * 4));
1340 writel(0, regs + VIDOSD_A(win, sfb->variant));
1341 writel(0, regs + VIDOSD_B(win, sfb->variant));
1342 writel(0, regs + VIDOSD_C(win, sfb->variant));
1344 if (sfb->variant.has_shadowcon) {
1345 reg = readl(sfb->regs + SHADOWCON);
1349 writel(reg, sfb->regs + SHADOWCON);
1359 struct s3c_fb *sfb;
1378 sfb = devm_kzalloc(dev, sizeof(*sfb), GFP_KERNEL);
1379 if (!sfb)
1382 dev_dbg(dev, "allocate new framebuffer %p\n", sfb);
1384 sfb->dev = dev;
1385 sfb->pdata = pd;
1386 sfb->variant = fbdrv->variant;
1388 spin_lock_init(&sfb->slock);
1390 sfb->bus_clk = devm_clk_get(dev, "lcd");
1391 if (IS_ERR(sfb->bus_clk))
1392 return dev_err_probe(dev, PTR_ERR(sfb->bus_clk),
1395 clk_prepare_enable(sfb->bus_clk);
1397 if (!sfb->variant.has_clksel) {
1398 sfb->lcd_clk = devm_clk_get(dev, "sclk_fimd");
1399 if (IS_ERR(sfb->lcd_clk)) {
1400 ret = dev_err_probe(dev, PTR_ERR(sfb->lcd_clk),
1405 clk_prepare_enable(sfb->lcd_clk);
1408 pm_runtime_enable(sfb->dev);
1410 sfb->regs = devm_platform_ioremap_resource(pdev, 0);
1411 if (IS_ERR(sfb->regs)) {
1412 ret = PTR_ERR(sfb->regs);
1416 sfb->irq_no = platform_get_irq(pdev, 0);
1417 if (sfb->irq_no < 0) {
1422 ret = devm_request_irq(dev, sfb->irq_no, s3c_fb_irq,
1423 0, "s3c_fb", sfb);
1429 dev_dbg(dev, "got resources (regs %p), probing windows\n", sfb->regs);
1431 platform_set_drvdata(pdev, sfb);
1432 pm_runtime_get_sync(sfb->dev);
1438 writel(pd->vidcon1, sfb->regs + VIDCON1);
1441 if (sfb->variant.has_fixvclk) {
1442 reg = readl(sfb->regs + VIDCON1);
1445 writel(reg, sfb->regs + VIDCON1);
1451 s3c_fb_clear_win(sfb, win);
1455 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1462 s3c_fb_set_rgb_timing(sfb);
1470 ret = s3c_fb_probe_win(sfb, win, fbdrv->win[win],
1471 &sfb->windows[win]);
1475 s3c_fb_release_win(sfb, sfb->windows[win]);
1480 platform_set_drvdata(pdev, sfb);
1481 pm_runtime_put_sync(sfb->dev);
1486 pm_runtime_put_sync(sfb->dev);
1489 pm_runtime_disable(sfb->dev);
1491 if (!sfb->variant.has_clksel)
1492 clk_disable_unprepare(sfb->lcd_clk);
1495 clk_disable_unprepare(sfb->bus_clk);
1509 struct s3c_fb *sfb = platform_get_drvdata(pdev);
1512 pm_runtime_get_sync(sfb->dev);
1515 if (sfb->windows[win])
1516 s3c_fb_release_win(sfb, sfb->windows[win]);
1518 if (!sfb->variant.has_clksel)
1519 clk_disable_unprepare(sfb->lcd_clk);
1521 clk_disable_unprepare(sfb->bus_clk);
1523 pm_runtime_put_sync(sfb->dev);
1524 pm_runtime_disable(sfb->dev);
1530 struct s3c_fb *sfb = dev_get_drvdata(dev);
1534 pm_runtime_get_sync(sfb->dev);
1537 win = sfb->windows[win_no];
1545 if (!sfb->variant.has_clksel)
1546 clk_disable_unprepare(sfb->lcd_clk);
1548 clk_disable_unprepare(sfb->bus_clk);
1550 pm_runtime_put_sync(sfb->dev);
1557 struct s3c_fb *sfb = dev_get_drvdata(dev);
1558 struct s3c_fb_platdata *pd = sfb->pdata;
1563 pm_runtime_get_sync(sfb->dev);
1565 clk_prepare_enable(sfb->bus_clk);
1567 if (!sfb->variant.has_clksel)
1568 clk_prepare_enable(sfb->lcd_clk);
1572 writel(pd->vidcon1, sfb->regs + VIDCON1);
1575 if (sfb->variant.has_fixvclk) {
1576 reg = readl(sfb->regs + VIDCON1);
1579 writel(reg, sfb->regs + VIDCON1);
1583 for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1584 s3c_fb_clear_win(sfb, win_no);
1586 for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1587 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1588 win = sfb->windows[win_no];
1599 s3c_fb_set_rgb_timing(sfb);
1603 win = sfb->windows[win_no];
1611 pm_runtime_put_sync(sfb->dev);
1620 struct s3c_fb *sfb = dev_get_drvdata(dev);
1622 if (!sfb->variant.has_clksel)
1623 clk_disable_unprepare(sfb->lcd_clk);
1625 clk_disable_unprepare(sfb->bus_clk);
1632 struct s3c_fb *sfb = dev_get_drvdata(dev);
1633 struct s3c_fb_platdata *pd = sfb->pdata;
1635 clk_prepare_enable(sfb->bus_clk);
1637 if (!sfb->variant.has_clksel)
1638 clk_prepare_enable(sfb->lcd_clk);
1642 writel(pd->vidcon1, sfb->regs + VIDCON1);