Lines Matching defs:par

448 static void set_memclock(struct pm2fb_par *par, u32 clk)
453 switch (par->type) {
456 WAIT_FIFO(par, 12);
457 pm2_WR(par, PM2VR_RD_INDEX_HIGH, PM2VI_RD_MCLK_CONTROL >> 8);
458 pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 0);
459 pm2v_RDAC_WR(par, PM2VI_RD_MCLK_PRESCALE, m);
460 pm2v_RDAC_WR(par, PM2VI_RD_MCLK_FEEDBACK, n);
461 pm2v_RDAC_WR(par, PM2VI_RD_MCLK_POSTSCALE, p);
462 pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 1);
465 if (pm2v_RDAC_RD(par, PM2VI_RD_MCLK_CONTROL) & 2)
467 pm2_WR(par, PM2VR_RD_INDEX_HIGH, 0);
471 WAIT_FIFO(par, 10);
472 pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 6);
473 pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_1, m);
474 pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_2, n);
475 pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 8|p);
476 pm2_RDAC_RD(par, PM2I_RD_MEMORY_CLOCK_STATUS);
479 if (pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED)
485 static void set_pixclock(struct pm2fb_par *par, u32 clk)
490 switch (par->type) {
493 WAIT_FIFO(par, 10);
494 pm2_RDAC_WR(par, PM2I_RD_PIXEL_CLOCK_A3, 0);
495 pm2_RDAC_WR(par, PM2I_RD_PIXEL_CLOCK_A1, m);
496 pm2_RDAC_WR(par, PM2I_RD_PIXEL_CLOCK_A2, n);
497 pm2_RDAC_WR(par, PM2I_RD_PIXEL_CLOCK_A3, 8|p);
498 pm2_RDAC_RD(par, PM2I_RD_PIXEL_CLOCK_STATUS);
501 if (pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED)
506 WAIT_FIFO(par, 8);
507 pm2_WR(par, PM2VR_RD_INDEX_HIGH, PM2VI_RD_CLK0_PRESCALE >> 8);
508 pm2v_RDAC_WR(par, PM2VI_RD_CLK0_PRESCALE, m);
509 pm2v_RDAC_WR(par, PM2VI_RD_CLK0_FEEDBACK, n);
510 pm2v_RDAC_WR(par, PM2VI_RD_CLK0_POSTSCALE, p);
511 pm2_WR(par, PM2VR_RD_INDEX_HIGH, 0);
691 struct pm2fb_par *par = info->par;
709 reset_card(par);
710 reset_config(par);
711 clear_palette(par);
712 if (par->memclock)
713 set_memclock(par, par->memclock);
716 data64 = depth > 8 || par->type == PM2_TYPE_PERMEDIA2V;
766 par->video = video;
776 if (par->type == PM2_TYPE_PERMEDIA2V) {
777 WAIT_FIFO(par, 1);
778 pm2_WR(par, PM2VR_RD_INDEX_HIGH, 0);
781 set_aperture(par, depth);
784 WAIT_FIFO(par, 19);
787 pm2_WR(par, PM2R_FB_READ_PIXEL, 0);
791 pm2_WR(par, PM2R_FB_READ_PIXEL, 1);
799 pm2_WR(par, PM2R_FB_READ_PIXEL, 2);
807 pm2_WR(par, PM2R_FB_READ_PIXEL, 4);
815 pm2_WR(par, PM2R_FB_WRITE_MODE, PM2F_FB_WRITE_ENABLE);
816 pm2_WR(par, PM2R_FB_READ_MODE, partprod(xres));
817 pm2_WR(par, PM2R_LB_READ_MODE, partprod(xres));
818 pm2_WR(par, PM2R_TEXTURE_MAP_FORMAT, txtmap | partprod(xres));
819 pm2_WR(par, PM2R_H_TOTAL, htotal);
820 pm2_WR(par, PM2R_HS_START, hsstart);
821 pm2_WR(par, PM2R_HS_END, hsend);
822 pm2_WR(par, PM2R_HG_END, hbend);
823 pm2_WR(par, PM2R_HB_END, hbend);
824 pm2_WR(par, PM2R_V_TOTAL, vtotal);
825 pm2_WR(par, PM2R_VS_START, vsstart);
826 pm2_WR(par, PM2R_VS_END, vsend);
827 pm2_WR(par, PM2R_VB_END, vbend);
828 pm2_WR(par, PM2R_SCREEN_STRIDE, stride);
830 pm2_WR(par, PM2R_WINDOW_ORIGIN, 0);
831 pm2_WR(par, PM2R_SCREEN_SIZE, (height << 16) | width);
832 pm2_WR(par, PM2R_SCISSOR_MODE, PM2F_SCREEN_SCISSOR_ENABLE);
834 pm2_WR(par, PM2R_SCREEN_BASE, base);
836 set_video(par, video);
837 WAIT_FIFO(par, 10);
838 switch (par->type) {
840 pm2_RDAC_WR(par, PM2I_RD_COLOR_MODE, clrmode);
841 pm2_RDAC_WR(par, PM2I_RD_COLOR_KEY_CONTROL,
845 pm2v_RDAC_WR(par, PM2VI_RD_DAC_CONTROL, 0);
846 pm2v_RDAC_WR(par, PM2VI_RD_PIXEL_SIZE, pixsize);
847 pm2v_RDAC_WR(par, PM2VI_RD_COLOR_FORMAT, clrformat);
848 pm2v_RDAC_WR(par, PM2VI_RD_MISC_CONTROL, misc);
849 pm2v_RDAC_WR(par, PM2VI_RD_OVERLAY_KEY, 0);
852 set_pixclock(par, pixclock);
877 struct pm2fb_par *par = info->par;
951 par->palette[regno] = v;
956 set_color(par, regno, red, green, blue);
976 struct pm2fb_par *p = info->par;
1006 struct pm2fb_par *par = info->par;
1007 u32 video = par->video;
1033 set_video(par, video);
1039 struct pm2fb_par *par = info->par;
1041 WAIT_FIFO(par, 1);
1042 pm2_WR(par, PM2R_SYNC, 0);
1045 while (pm2_RD(par, PM2R_OUT_FIFO_WORDS) == 0)
1047 } while (pm2_RD(par, PM2R_OUT_FIFO) != PM2TAG(PM2R_SYNC));
1055 struct pm2fb_par *par = info->par;
1088 WAIT_FIFO(par, 3);
1089 pm2_WR(par, PM2R_CONFIG, PM2F_CONFIG_FB_WRITE_ENABLE);
1090 pm2_WR(par, PM2R_RECTANGLE_ORIGIN, (modded.dy << 16) | modded.dx);
1091 pm2_WR(par, PM2R_RECTANGLE_SIZE, (modded.height << 16) | modded.width);
1093 WAIT_FIFO(par, 2);
1094 pm2_WR(par, PM2R_FB_BLOCK_COLOR, color);
1096 pm2_WR(par, PM2R_RENDER,
1099 WAIT_FIFO(par, 4);
1100 pm2_WR(par, PM2R_COLOR_DDA_MODE, 1);
1101 pm2_WR(par, PM2R_CONSTANT_COLOR, color);
1103 pm2_WR(par, PM2R_RENDER,
1106 pm2_WR(par, PM2R_COLOR_DDA_MODE, 0);
1113 struct pm2fb_par *par = info->par;
1143 WAIT_FIFO(par, 5);
1144 pm2_WR(par, PM2R_CONFIG, PM2F_CONFIG_FB_WRITE_ENABLE |
1146 pm2_WR(par, PM2R_FB_SOURCE_DELTA,
1149 pm2_WR(par, PM2R_RECTANGLE_ORIGIN, (modded.dy << 16) | modded.dx);
1150 pm2_WR(par, PM2R_RECTANGLE_SIZE, (modded.height << 16) | modded.width);
1152 pm2_WR(par, PM2R_RENDER, PM2F_RENDER_RECTANGLE |
1159 struct pm2fb_par *par = info->par;
1183 fgx = par->palette[image->fg_color];
1184 bgx = par->palette[image->bg_color];
1196 WAIT_FIFO(par, 13);
1197 pm2_WR(par, PM2R_FB_READ_MODE, partprod(xres));
1198 pm2_WR(par, PM2R_SCISSOR_MIN_XY,
1200 pm2_WR(par, PM2R_SCISSOR_MAX_XY,
1203 pm2_WR(par, PM2R_SCISSOR_MODE, 1);
1205 pm2_WR(par, PM2R_LOGICAL_OP_MODE, (0x3 << 1) | 1);
1206 pm2_WR(par, PM2R_RECTANGLE_ORIGIN,
1208 pm2_WR(par, PM2R_RECTANGLE_SIZE,
1212 pm2_WR(par, PM2R_COLOR_DDA_MODE, 1);
1214 pm2_WR(par, PM2R_CONSTANT_COLOR, bgx);
1215 pm2_WR(par, PM2R_RENDER,
1219 pm2_WR(par, PM2R_RASTERIZER_MODE, raster_mode | (1 << 9));
1220 pm2_WR(par, PM2R_CONSTANT_COLOR, fgx);
1221 pm2_WR(par, PM2R_RENDER,
1226 pm2_WR(par, PM2R_COLOR_DDA_MODE, 0);
1228 pm2_WR(par, PM2R_FB_BLOCK_COLOR, bgx);
1229 pm2_WR(par, PM2R_RENDER,
1233 pm2_WR(par, PM2R_RASTERIZER_MODE, raster_mode);
1234 pm2_WR(par, PM2R_FB_BLOCK_COLOR, fgx);
1235 pm2_WR(par, PM2R_RENDER,
1246 WAIT_FIFO(par, width);
1248 pm2_WR(par, PM2R_BIT_MASK_PATTERN, *src);
1252 WAIT_FIFO(par, 3);
1253 pm2_WR(par, PM2R_RASTERIZER_MODE, 0);
1254 pm2_WR(par, PM2R_COLOR_DDA_MODE, 0);
1255 pm2_WR(par, PM2R_SCISSOR_MODE, 0);
1268 struct pm2fb_par *par = info->par;
1276 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_MODE, mode);
1280 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_X_LOW, x & 0xff);
1281 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_X_HIGH, (x >> 8) & 0xf);
1282 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_Y_LOW, y & 0xff);
1283 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_Y_HIGH, (y >> 8) & 0xf);
1294 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_X_HOT,
1296 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_Y_HOT,
1306 pm2_WR(par, PM2VR_RD_INDEX_HIGH, PM2VI_RD_CURSOR_PALETTE >> 8);
1307 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_PALETTE + 0,
1309 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_PALETTE + 1,
1311 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_PALETTE + 2,
1314 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_PALETTE + 3,
1316 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_PALETTE + 4,
1318 pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_PALETTE + 5,
1320 pm2_WR(par, PM2VR_RD_INDEX_HIGH, 0);
1333 pm2_WR(par, PM2VR_RD_INDEX_HIGH, pos >> 8);
1341 pm2v_RDAC_WR(par, pos++,
1345 pm2v_RDAC_WR(par, pos++,
1352 pm2v_RDAC_WR(par, pos++, 0);
1353 pm2v_RDAC_WR(par, pos++, 0);
1358 pm2_WR(par, PM2VR_RD_INDEX_HIGH, pos >> 8);
1359 pm2v_RDAC_WR(par, pos++, 0);
1362 pm2_WR(par, PM2VR_RD_INDEX_HIGH, 0);
1369 struct pm2fb_par *par = info->par;
1381 if (par->type == PM2_TYPE_PERMEDIA2V)
1388 pm2_RDAC_WR(par, PM2I_RD_CURSOR_CONTROL, mode);
1402 WAIT_FIFO(par, 4);
1403 pm2_WR(par, PM2R_RD_CURSOR_X_LSB, x & 0xff);
1404 pm2_WR(par, PM2R_RD_CURSOR_X_MSB, (x >> 8) & 0x7);
1405 pm2_WR(par, PM2R_RD_CURSOR_Y_LSB, y & 0xff);
1406 pm2_WR(par, PM2R_RD_CURSOR_Y_MSB, (y >> 8) & 0x7);
1413 WAIT_FIFO(par, 7);
1414 pm2_WR(par, PM2R_RD_CURSOR_COLOR_ADDRESS, 1);
1415 pm2_WR(par, PM2R_RD_CURSOR_COLOR_DATA,
1417 pm2_WR(par, PM2R_RD_CURSOR_COLOR_DATA,
1419 pm2_WR(par, PM2R_RD_CURSOR_COLOR_DATA,
1422 pm2_WR(par, PM2R_RD_CURSOR_COLOR_DATA,
1424 pm2_WR(par, PM2R_RD_CURSOR_COLOR_DATA,
1426 pm2_WR(par, PM2R_RD_CURSOR_COLOR_DATA,
1435 WAIT_FIFO(par, 1);
1436 pm2_WR(par, PM2R_RD_PALETTE_WRITE_ADDRESS, 0);
1442 WAIT_FIFO(par, 8);
1449 pm2_WR(par, PM2R_RD_CURSOR_DATA, data);
1454 pm2_WR(par, PM2R_RD_CURSOR_DATA, 0);
1458 WAIT_FIFO(par, 8);
1460 pm2_WR(par, PM2R_RD_CURSOR_DATA, 0);
1468 WAIT_FIFO(par, 8);
1471 pm2_WR(par, PM2R_RD_CURSOR_DATA, *mask);
1475 pm2_WR(par, PM2R_RD_CURSOR_DATA, 0);
1479 WAIT_FIFO(par, 8);
1481 pm2_WR(par, PM2R_RD_CURSOR_DATA, 0);
1540 default_par = info->par;
1733 struct pm2fb_par *par = info->par;
1736 arch_phys_wc_del(par->wc_cookie);
1739 iounmap(par->v_regs);