Lines Matching defs:sossi
22 #define MODULE_NAME "omapfb-sossi"
70 } sossi;
74 return readl(sossi.base + reg);
79 return readw(sossi.base + reg);
84 return readb(sossi.base + reg);
89 writel(value, sossi.base + reg);
94 writew(value, sossi.base + reg);
99 writeb(value, sossi.base + reg);
116 u32 clk_period = HZ_TO_PS(sossi.fck_hz) * div;
131 /* reon will be exactly one sossi tick */
159 * access time (data hold time) will be exactly one sossi
182 /* weon will be exactly one sossi tick */
215 dev_dbg(sossi.fbdev->dev, "Using TW0 = %d, TW1 = %d, div = %d\n",
219 clk_set_rate(sossi.fck, sossi.fck_hz / div);
220 clk_enable(sossi.fck);
225 clk_disable(sossi.fck);
256 if (access != sossi.last_access) {
257 sossi.last_access = access;
258 _set_timing(sossi.clk_div,
259 sossi.clk_tw0[access], sossi.clk_tw1[access]);
306 unsigned long nr_cycles = len / (sossi.bus_pick_width / 8);
342 sossi.clk_tw0[RD_ACCESS] = t->tim[0];
343 sossi.clk_tw1[RD_ACCESS] = t->tim[1];
345 sossi.clk_tw0[WR_ACCESS] = t->tim[2];
346 sossi.clk_tw1[WR_ACCESS] = t->tim[3];
348 sossi.clk_div = t->tim[4];
353 *clk_period = HZ_TO_PS(sossi.fck_hz);
379 sossi.bus_pick_width = bus_pick_width;
380 sossi.bus_pick_count = bus_pick_count;
404 dev_dbg(sossi.fbdev->dev,
408 clk_enable(sossi.fck);
422 clk_disable(sossi.fck);
431 dev_dbg(sossi.fbdev->dev, "tearsync %d line %d\n", enable, line);
441 sossi.tearsync_line = line;
442 sossi.tearsync_mode = mode;
449 clk_enable(sossi.fck);
451 _set_bits_per_cycle(sossi.bus_pick_count, sossi.bus_pick_width);
459 clk_disable(sossi.fck);
464 clk_enable(sossi.fck);
466 _set_bits_per_cycle(sossi.bus_pick_count, sossi.bus_pick_width);
474 clk_disable(sossi.fck);
482 sossi.lcdc_callback = callback;
483 sossi.lcdc_callback_data = data;
485 clk_enable(sossi.fck);
487 _set_bits_per_cycle(sossi.bus_pick_count, sossi.bus_pick_width);
488 _set_tearsync_mode(sossi.tearsync_mode, sossi.tearsync_line);
491 set_cycles(width * height * sossi.bus_pick_width / 8);
494 if (sossi.tearsync_mode) {
503 spin_lock_irqsave(&sossi.lock, flags);
504 sossi.vsync_dma_pending++;
505 spin_unlock_irqrestore(&sossi.lock, flags);
515 clk_disable(sossi.fck);
516 sossi.lcdc_callback(sossi.lcdc_callback_data);
521 clk_enable(sossi.fck);
523 _set_bits_per_cycle(sossi.bus_pick_count, sossi.bus_pick_width);
544 clk_disable(sossi.fck);
551 spin_lock_irqsave(&sossi.lock, flags);
552 if (sossi.vsync_dma_pending) {
553 sossi.vsync_dma_pending--;
556 spin_unlock_irqrestore(&sossi.lock, flags);
567 sossi.base = ioremap(OMAP_SOSSI_BASE, SZ_1K);
568 if (!sossi.base) {
573 sossi.fbdev = fbdev;
574 spin_lock_init(&sossi.lock);
586 sossi.fck_hz = clk_get_rate(dpll1out_ck);
594 sossi.fck = fck;
603 clk_prepare_enable(sossi.fck);
645 "sossi_match", sossi.fbdev->dev)) < 0) {
646 dev_err(sossi.fbdev->dev, "can't get SoSSI match IRQ\n");
650 clk_disable(sossi.fck);
654 clk_disable_unprepare(sossi.fck);
655 clk_put(sossi.fck);
662 clk_unprepare(sossi.fck);
663 clk_put(sossi.fck);
664 iounmap(sossi.base);