Lines Matching defs:hwa742
131 } hwa742;
139 hwa742.extif->set_bits_per_cycle(8);
140 hwa742.extif->write_command(®, 1);
141 hwa742.extif->read_data(&data, 1);
148 hwa742.extif->set_bits_per_cycle(8);
149 hwa742.extif->write_command(®, 1);
150 hwa742.extif->write_data(&data, 1);
169 hwa742.extif->set_bits_per_cycle(8);
172 hwa742.extif->write_command(&cmd, 1);
174 hwa742.extif->write_data(tmp, 8);
180 hwa742.window_type = ((hwa742.window_type & 0xfc) | 0x01);
182 dev_dbg(hwa742.fbdev->dev, "hwa742: enabled pixel doubling\n");
185 hwa742.window_type = (hwa742.window_type & 0xfc);
187 dev_dbg(hwa742.fbdev->dev, "hwa742: disabled pixel doubling\n");
193 hwa742_write_reg(HWA742_WINDOW_TYPE, hwa742.window_type);
205 if (likely(hwa742.vsync_only || force_vsync)) {
206 hwa742.extif->enable_tearsync(1, 0);
210 if (width * hwa742.pix_tx_time < hwa742.line_upd_time) {
211 hwa742.extif->enable_tearsync(1, 0);
215 if ((width * hwa742.pix_tx_time / 1000) * height <
216 (y + height) * (hwa742.line_upd_time / 1000)) {
217 hwa742.extif->enable_tearsync(1, 0);
221 hwa742.extif->enable_tearsync(1, y + 1);
228 hwa742.extif->enable_tearsync(0, 0);
242 down(&hwa742.req_sema);
246 spin_lock_irqsave(&hwa742.req_lock, flags);
247 BUG_ON(list_empty(&hwa742.free_req_list));
248 req = list_entry(hwa742.free_req_list.next,
251 spin_unlock_irqrestore(&hwa742.req_lock, flags);
263 spin_lock_irqsave(&hwa742.req_lock, flags);
265 list_move(&req->entry, &hwa742.free_req_list);
267 up(&hwa742.req_sema);
269 spin_unlock_irqrestore(&hwa742.req_lock, flags);
276 spin_lock_irqsave(&hwa742.req_lock, flags);
278 while (!list_empty(&hwa742.pending_req_list)) {
283 req = list_entry(hwa742.pending_req_list.next,
285 spin_unlock_irqrestore(&hwa742.req_lock, flags);
297 spin_lock_irqsave(&hwa742.req_lock, flags);
300 spin_unlock_irqrestore(&hwa742.req_lock, flags);
308 spin_lock_irqsave(&hwa742.req_lock, flags);
309 if (likely(!list_empty(&hwa742.pending_req_list)))
311 list_splice_init(head, hwa742.pending_req_list.prev);
312 spin_unlock_irqrestore(&hwa742.req_lock, flags);
347 int scr_width = hwa742.fbdev->panel->x_res;
348 int scr_height = hwa742.fbdev->panel->y_res;
351 dev_dbg(hwa742.fbdev->dev, "x %d y %d w %d h %d scr_width %d "
376 if (hwa742.prev_flags != flags ||
377 hwa742.prev_color_mode != color_mode) {
379 hwa742.prev_color_mode = color_mode;
380 hwa742.prev_flags = flags;
393 hwa742.int_ctrl->setup_plane(OMAPFB_PLANE_GFX,
397 hwa742.extif->set_bits_per_cycle(16);
399 hwa742.int_ctrl->enable_plane(OMAPFB_PLANE_GFX, 1);
400 hwa742.extif->transfer_area(w, h, request_complete, req);
407 hwa742.int_ctrl->enable_plane(OMAPFB_PLANE_GFX, 0);
449 if (xspan * height * 2 > hwa742.max_transmit_size) {
450 yspan = hwa742.max_transmit_size / (xspan * 2);
468 if (!hwa742.stop_auto_update)
469 mod_timer(&hwa742.auto_update_timer,
478 create_req_list(&hwa742.auto_update_window, &req_list, can_sleep);
501 if (hwa742.update_mode != OMAPFB_MANUAL_UPDATE) {
502 dev_dbg(hwa742.fbdev->dev, "invalid update mode\n");
509 dev_dbg(hwa742.fbdev->dev, "invalid window flag\n");
543 hwa742.int_ctrl->enable_plane(plane, enable);
575 dev_dbg(hwa742.fbdev->dev, "update_mode %d\n", hwa742.update_mode);
576 if (hwa742.update_mode == OMAPFB_MANUAL_UPDATE) {
577 omapfb_notify_clients(hwa742.fbdev, OMAPFB_EVENT_READY);
587 if (mode == hwa742.update_mode)
590 dev_info(hwa742.fbdev->dev, "HWA742: setting update mode to %s\n",
594 switch (hwa742.update_mode) {
596 omapfb_notify_clients(hwa742.fbdev, OMAPFB_EVENT_DISABLED);
599 hwa742.stop_auto_update = 1;
600 del_timer_sync(&hwa742.auto_update_timer);
606 hwa742.update_mode = mode;
608 hwa742.stop_auto_update = 0;
612 omapfb_notify_clients(hwa742.fbdev, OMAPFB_EVENT_READY);
626 return hwa742.update_mode;
631 int bus_tick = hwa742.extif_clk_period * div;
649 dev_dbg(hwa742.fbdev->dev, "HWA742 systim %lu ps extif_clk_period %u ps"
650 "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div);
652 t = &hwa742.reg_timings;
670 dev_dbg(hwa742.fbdev->dev, "[reg]cson %d csoff %d reon %d reoff %d\n",
672 dev_dbg(hwa742.fbdev->dev, "[reg]weon %d weoff %d recyc %d wecyc %d\n",
675 dev_dbg(hwa742.fbdev->dev, "[reg]rdaccess %d cspulse %d\n",
678 return hwa742.extif->convert_timings(t);
696 dev_dbg(hwa742.fbdev->dev, "HWA742 systim %lu ps extif_clk_period %u ps"
697 "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div);
699 t = &hwa742.lut_timings;
721 dev_dbg(hwa742.fbdev->dev, "[lut]cson %d csoff %d reon %d reoff %d\n",
723 dev_dbg(hwa742.fbdev->dev, "[lut]weon %d weoff %d recyc %d wecyc %d\n",
726 dev_dbg(hwa742.fbdev->dev, "[lut]rdaccess %d cspulse %d\n",
729 return hwa742.extif->convert_timings(t);
737 hwa742.extif->get_clk_info(&hwa742.extif_clk_period, &max_clk_div);
758 dev_err(hwa742.fbdev->dev, "can't setup timings\n");
780 dev_dbg(hwa742.fbdev->dev,
783 dev_dbg(hwa742.fbdev->dev, "sys_clk %ld pix_clk %ld\n",
813 hwa742.pix_tx_time = hwa742.reg_timings.we_cycle_time;
814 if (hwa742.extif->get_max_tx_rate != NULL) {
820 unsigned long max_tx_rate = hwa742.extif->get_max_tx_rate();
822 dev_dbg(hwa742.fbdev->dev, "max_tx_rate %ld HZ\n",
825 if (hwa742.pix_tx_time < min_tx_time)
826 hwa742.pix_tx_time = min_tx_time;
830 hwa742.line_upd_time = (hdisp + hndp) * 1000000 / (pix_clk / 1000);
831 hwa742.line_upd_time *= 1000;
832 if (hdisp * hwa742.pix_tx_time > hwa742.line_upd_time)
885 hwa742.vsync_only = !use_hsvs;
887 dev_dbg(hwa742.fbdev->dev,
889 pix_clk, hwa742.pix_tx_time, hwa742.line_upd_time);
890 dev_dbg(hwa742.fbdev->dev,
894 return hwa742.extif->setup_tearsync(1, hs, vs,
900 hwa742.int_ctrl->get_caps(plane, caps);
903 if (hwa742.te_connected)
911 hwa742.update_mode_before_suspend = hwa742.update_mode;
915 clk_disable(hwa742.sys_ck);
920 clk_enable(hwa742.sys_ck);
931 hwa742_set_update_mode(hwa742.update_mode_before_suspend);
946 hwa742.fbdev = fbdev;
947 hwa742.extif = fbdev->ext_if;
948 hwa742.int_ctrl = fbdev->int_ctrl;
952 hwa742.sys_ck = clk_get(NULL, "hwa_sys_ck");
954 spin_lock_init(&hwa742.req_lock);
956 if ((r = hwa742.int_ctrl->init(fbdev, 1, req_vram)) < 0)
959 if ((r = hwa742.extif->init(fbdev)) < 0)
962 ext_clk = clk_get_rate(hwa742.sys_ck);
965 hwa742.extif->set_timings(&hwa742.reg_timings);
966 clk_prepare_enable(hwa742.sys_ck);
971 hwa742.extif->set_timings(&hwa742.reg_timings);
989 dev_err(hwa742.fbdev->dev,
993 hwa742.te_connected = 1;
995 hwa742.max_transmit_size = hwa742.extif->max_transmit_size;
997 hwa742.update_mode = OMAPFB_UPDATE_DISABLED;
999 hwa742.auto_update_window.x = 0;
1000 hwa742.auto_update_window.y = 0;
1001 hwa742.auto_update_window.width = fbdev->panel->x_res;
1002 hwa742.auto_update_window.height = fbdev->panel->y_res;
1003 hwa742.auto_update_window.format = 0;
1005 timer_setup(&hwa742.auto_update_timer, hwa742_update_window_auto, 0);
1007 hwa742.prev_color_mode = -1;
1008 hwa742.prev_flags = 0;
1010 hwa742.fbdev = fbdev;
1012 INIT_LIST_HEAD(&hwa742.free_req_list);
1013 INIT_LIST_HEAD(&hwa742.pending_req_list);
1014 for (i = 0; i < ARRAY_SIZE(hwa742.req_pool); i++)
1015 list_add(&hwa742.req_pool[i].entry, &hwa742.free_req_list);
1017 sema_init(&hwa742.req_sema, i - IRQ_REQ_POOL_SIZE);
1025 clk_disable_unprepare(hwa742.sys_ck);
1027 hwa742.extif->cleanup();
1029 hwa742.int_ctrl->cleanup();
1037 hwa742.extif->cleanup();
1038 hwa742.int_ctrl->cleanup();
1039 clk_disable_unprepare(hwa742.sys_ck);
1043 .name = "hwa742",