Lines Matching defs:dc_regs
318 __u32 __iomem *dc_regs;
702 write_reg_le32(par->dc_regs, HES, init->hes);
703 write_reg_le32(par->dc_regs, HEB, init->heb);
704 write_reg_le32(par->dc_regs, HSB, init->hsb);
705 write_reg_le32(par->dc_regs, HT, init->ht);
706 write_reg_le32(par->dc_regs, VES, init->ves);
707 write_reg_le32(par->dc_regs, VEB, init->veb);
708 write_reg_le32(par->dc_regs, VSB, init->vsb);
709 write_reg_le32(par->dc_regs, VT, init->vt);
710 write_reg_le32(par->dc_regs, VIL, init->vil);
711 write_reg_le32(par->dc_regs, HCIV, 1);
712 write_reg_le32(par->dc_regs, VCIV, 1);
713 write_reg_le32(par->dc_regs, TCDR, 4);
714 write_reg_le32(par->dc_regs, RRCIV, 1);
715 write_reg_le32(par->dc_regs, RRSC, 0x980);
716 write_reg_le32(par->dc_regs, RRCR, 0x11);
719 write_reg_le32(par->dc_regs, HRIR, 0x0100);
720 write_reg_le32(par->dc_regs, CMR, 0x00ff);
721 write_reg_le32(par->dc_regs, SRGCTL, 0x0073);
723 write_reg_le32(par->dc_regs, HRIR, 0x0200);
724 write_reg_le32(par->dc_regs, CMR, 0x01ff);
725 write_reg_le32(par->dc_regs, SRGCTL, 0x0003);
740 write_reg_le32(par->dc_regs, SCR, scr);
741 write_reg_le32(par->dc_regs, SPR, pitch);
742 write_reg_le32(par->dc_regs, STGCTL, ctl);
751 write_reg_le32(par->dc_regs, SSR, off);
940 ctrl = read_reg_le32(par->dc_regs, STGCTL);
984 write_reg_le32(par->dc_regs, STGCTL, ctrl);
1009 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
1010 write_reg_le32(par->dc_regs, DSA, dy + dx);
1011 write_reg_le32(par->dc_regs, CNT, (height << 16) | width);
1012 write_reg_le32(par->dc_regs, DP_OCTL, line_pitch);
1013 write_reg_le32(par->dc_regs, BI, 0xffffffff);
1014 write_reg_le32(par->dc_regs, MBC, 0xffffffff);
1015 write_reg_le32(par->dc_regs, CLR, bgc);
1016 write_reg_le32(par->dc_regs, BLTCTL, 0x840); /* 0x200000 */
1017 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
1018 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x40);
1020 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
1021 write_reg_le32(par->dc_regs, DSA, dy + dx);
1022 write_reg_le32(par->dc_regs, S1SA, dy + dx);
1023 write_reg_le32(par->dc_regs, CNT, (height << 16) | width);
1024 write_reg_le32(par->dc_regs, DP_OCTL, line_pitch);
1025 write_reg_le32(par->dc_regs, SP, line_pitch);
1026 write_reg_le32(par->dc_regs, BLTCTL, 0x40005);
1027 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
1028 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x40);
1075 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
1076 write_reg_le32(par->dc_regs, S1SA, fb_offset_old);
1077 write_reg_le32(par->dc_regs, SP, sp);
1078 write_reg_le32(par->dc_regs, DSA, fb_offset_new);
1079 write_reg_le32(par->dc_regs, CNT, cnt);
1080 write_reg_le32(par->dc_regs, DP_OCTL, dp_octl);
1081 write_reg_le32(par->dc_regs, BLTCTL, bltctl);
1082 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
1083 while(read_reg_le32(par->dc_regs, SSTATUS) & 0x40);
1278 write_reg_le32(par->dc_regs, reg[0], reg[1]);
1283 reg[1] = read_reg_le32(par->dc_regs, reg[0]);
1355 tmp = read_reg_le32(par->dc_regs, PRC);
1367 tmp = read_reg_le32(par->dc_regs, STGCTL);
1368 write_reg_le32(par->dc_regs, STGCTL, tmp & ~0x1);
1369 write_reg_le32(par->dc_regs, SSR, 0);
1461 tmp = (read_reg_le32(par->dc_regs, SSTATUS) & 0x0f00) >> 8;
1524 par->dc_regs = ioremap(addr + 0x800000, 0x1000);
1525 if (!par->dc_regs)
1542 iounmap(par->dc_regs);
1560 iounmap(par->dc_regs);