Lines Matching defs:par
99 static void i810fb_release_resource (struct fb_info *info, struct i810fb_par *par);
226 * @par: pointer to i810fb_par structure
231 static void i810_load_pll(struct i810fb_par *par)
234 u8 __iomem *mmio = par->mmio_start_virtual;
236 tmp1 = par->regs.M | par->regs.N << 16;
241 tmp1 = par->regs.P;
246 i810_writeb(MSR_WRITE, mmio, par->regs.msr | 0xC8 | 1);
252 * @par: pointer to i810fb_par structure
257 static void i810_load_vga(struct i810fb_par *par)
259 u8 __iomem *mmio = par->mmio_start_virtual;
263 i810_writeb(CR_DATA_CGA, mmio, par->interlace);
266 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr00);
268 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr01);
270 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr02);
272 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr03);
274 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr04);
276 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr05);
278 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr06);
280 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr09);
282 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr10);
284 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr11);
286 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr12);
288 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr15);
290 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr16);
295 * @par: pointer to i810fb_par structure
300 static void i810_load_vgax(struct i810fb_par *par)
302 u8 __iomem *mmio = par->mmio_start_virtual;
305 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr30);
307 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr31);
309 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr32);
311 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr33);
313 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr35);
315 i810_writeb(CR_DATA_CGA, mmio, par->regs.cr39);
320 * @par: pointer to i810fb_par structure
325 static void i810_load_2d(struct i810fb_par *par)
329 u8 __iomem *mmio = par->mmio_start_virtual;
331 i810_writel(FW_BLC, mmio, par->watermark);
336 i810_writel(OVRACT, mmio, par->ovract);
363 * @par: pointer to i810fb_par structure
368 static void i810_load_pitch(struct i810fb_par *par)
372 u8 __iomem *mmio = par->mmio_start_virtual;
374 pitch = par->pitch >> 3;
395 * @par: pointer to i810fb_par structure
400 static void i810_load_color(struct i810fb_par *par)
402 u8 __iomem *mmio = par->mmio_start_virtual;
409 reg1 |= 0x8000 | par->pixconf;
410 reg2 |= par->bltcntl;
417 * @par: pointer to i810fb_par structure
422 static void i810_load_regs(struct i810fb_par *par)
424 u8 __iomem *mmio = par->mmio_start_virtual;
429 i810_load_pll(par);
430 i810_load_vga(par);
431 i810_load_vgax(par);
433 i810_load_2d(par);
437 i810_load_color(par);
438 i810_load_pitch(par);
462 static void i810_restore_pll(struct i810fb_par *par)
465 u8 __iomem *mmio = par->mmio_start_virtual;
467 tmp1 = par->hw_state.dclk_2d;
473 tmp1 = par->hw_state.dclk_1d;
479 i810_writel(DCLK_0DS, mmio, par->hw_state.dclk_0ds);
482 static void i810_restore_dac(struct i810fb_par *par)
485 u8 __iomem *mmio = par->mmio_start_virtual;
487 tmp1 = par->hw_state.pixconf;
494 static void i810_restore_vgax(struct i810fb_par *par)
497 u8 __iomem *mmio = par->mmio_start_virtual;
501 i810_writeb(CR_DATA_CGA, mmio, *(&(par->hw_state.cr30) + i));
504 i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr35);
506 i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr39);
508 i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr39);
512 i = par->hw_state.cr70;
519 i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr80);
520 i810_writeb(MSR_WRITE, mmio, par->hw_state.msr);
522 i = (par->hw_state.sr01) & ~0xE0 ;
528 static void i810_restore_vga(struct i810fb_par *par)
531 u8 __iomem *mmio = par->mmio_start_virtual;
535 i810_writeb(CR_DATA_CGA, mmio, *((&par->hw_state.cr00) + i));
539 i810_writeb(CR_DATA_CGA, mmio, *((&par->hw_state.cr10) + i));
543 static void i810_restore_addr_map(struct i810fb_par *par)
546 u8 __iomem *mmio = par->mmio_start_virtual;
551 tmp |= par->hw_state.gr10;
556 static void i810_restore_2d(struct i810fb_par *par)
560 u8 __iomem *mmio = par->mmio_start_virtual;
564 tmp_word |= par->hw_state.bltcntl;
568 i810_writel(PIXCONF, mmio, par->hw_state.pixconf);
573 tmp_word |= par->hw_state.hwstam;
578 tmp_long |= par->hw_state.fw_blc;
581 i810_writel(HWS_PGA, mmio, par->hw_state.hws_pga);
582 i810_writew(IER, mmio, par->hw_state.ier);
583 i810_writew(IMR, mmio, par->hw_state.imr);
584 i810_writel(DPLYSTAS, mmio, par->hw_state.dplystas);
587 static void i810_restore_vga_state(struct i810fb_par *par)
589 u8 __iomem *mmio = par->mmio_start_virtual;
594 i810_restore_pll(par);
595 i810_restore_dac(par);
596 i810_restore_vga(par);
597 i810_restore_vgax(par);
598 i810_restore_addr_map(par);
600 i810_restore_2d(par);
609 static void i810_save_vgax(struct i810fb_par *par)
612 u8 __iomem *mmio = par->mmio_start_virtual;
616 *(&(par->hw_state.cr30) + i) = i810_readb(CR_DATA_CGA, mmio);
619 par->hw_state.cr35 = i810_readb(CR_DATA_CGA, mmio);
621 par->hw_state.cr39 = i810_readb(CR_DATA_CGA, mmio);
623 par->hw_state.cr41 = i810_readb(CR_DATA_CGA, mmio);
625 par->hw_state.cr70 = i810_readb(CR_DATA_CGA, mmio);
626 par->hw_state.msr = i810_readb(MSR_READ, mmio);
628 par->hw_state.cr80 = i810_readb(CR_DATA_CGA, mmio);
630 par->hw_state.sr01 = i810_readb(SR_DATA, mmio);
633 static void i810_save_vga(struct i810fb_par *par)
636 u8 __iomem *mmio = par->mmio_start_virtual;
640 *((&par->hw_state.cr00) + i) = i810_readb(CR_DATA_CGA, mmio);
644 *((&par->hw_state.cr10) + i) = i810_readb(CR_DATA_CGA, mmio);
648 static void i810_save_2d(struct i810fb_par *par)
650 u8 __iomem *mmio = par->mmio_start_virtual;
652 par->hw_state.dclk_2d = i810_readl(DCLK_2D, mmio);
653 par->hw_state.dclk_1d = i810_readl(DCLK_1D, mmio);
654 par->hw_state.dclk_0ds = i810_readl(DCLK_0DS, mmio);
655 par->hw_state.pixconf = i810_readl(PIXCONF, mmio);
656 par->hw_state.fw_blc = i810_readl(FW_BLC, mmio);
657 par->hw_state.bltcntl = i810_readw(BLTCNTL, mmio);
658 par->hw_state.hwstam = i810_readw(HWSTAM, mmio);
659 par->hw_state.hws_pga = i810_readl(HWS_PGA, mmio);
660 par->hw_state.ier = i810_readw(IER, mmio);
661 par->hw_state.imr = i810_readw(IMR, mmio);
662 par->hw_state.dplystas = i810_readl(DPLYSTAS, mmio);
665 static void i810_save_vga_state(struct i810fb_par *par)
667 i810_save_vga(par);
668 i810_save_vgax(par);
669 i810_save_2d(par);
677 * @par: pointer to i810fb_par structure
684 static u32 get_line_length(struct i810fb_par *par, int xres_virtual, int bpp)
784 static void i810_reset_cursor_image(struct i810fb_par *par)
786 u8 __iomem *addr = par->cursor_heap.virtual;
799 struct i810fb_par *par)
801 u8 __iomem *addr = par->cursor_heap.virtual;
822 struct i810fb_par *par = info->par;
823 u8 __iomem *mmio = par->mmio_start_virtual;
846 * @par: pointer to i810fb_par structure
851 static void i810_init_cursor(struct i810fb_par *par)
853 u8 __iomem *mmio = par->mmio_start_virtual;
856 i810_writel(CURBASE, mmio, par->cursor_heap.physical);
995 struct i810fb_par *par = info->par;
1002 line_length = get_line_length(par, vxres, var->bits_per_pixel);
1005 if (vidmem > par->fb.size) {
1006 vyres = par->fb.size/line_length;
1009 vxres = par->fb.size/vyres;
1011 line_length = get_line_length(par, vxres,
1090 struct i810fb_par *par = info->par;
1096 fix->smem_start = par->fb.physical;
1097 fix->smem_len = par->fb.size;
1120 fix->line_length = par->pitch;
1121 fix->mmio_start = par->mmio_start_phys;
1129 * decode_var - modify par according to contents of var
1131 * @par: pointer to i810fb_par
1134 * Based on the contents of @var, @par will be dynamically filled up.
1135 * @par contains all information necessary to modify the hardware.
1138 struct i810fb_par *par)
1149 par->pixconf = PIXCONF8;
1150 par->bltcntl = 0;
1151 par->depth = 1;
1152 par->blit_bpp = BPP8;
1156 par->pixconf = PIXCONF15;
1158 par->pixconf = PIXCONF16;
1159 par->bltcntl = 16;
1160 par->depth = 2;
1161 par->blit_bpp = BPP16;
1164 par->pixconf = PIXCONF24;
1165 par->bltcntl = 32;
1166 par->depth = 3;
1167 par->blit_bpp = BPP24;
1170 par->pixconf = PIXCONF32;
1171 par->bltcntl = 0;
1172 par->depth = 4;
1173 par->blit_bpp = 3 << 24;
1177 par->pixconf |= 1 << 27;
1179 i810_calc_dclk(var->pixclock, &par->regs.M,
1180 &par->regs.N, &par->regs.P);
1181 i810fb_encode_registers(var, par, xres, yres);
1183 par->watermark = i810_get_watermark(var, par);
1184 par->pitch = get_line_length(par, vxres, var->bits_per_pixel);
1203 struct i810fb_par *par = info->par;
1204 u8 __iomem *mmio = par->mmio_start_virtual;
1242 struct i810fb_par *par = info->par;
1244 mutex_lock(&par->open_lock);
1245 if (par->use_count == 0) {
1246 memset(&par->state, 0, sizeof(struct vgastate));
1247 par->state.flags = VGA_SAVE_CMAP;
1248 par->state.vgabase = par->mmio_start_virtual;
1249 save_vga(&par->state);
1251 i810_save_vga_state(par);
1254 par->use_count++;
1255 mutex_unlock(&par->open_lock);
1262 struct i810fb_par *par = info->par;
1264 mutex_lock(&par->open_lock);
1265 if (par->use_count == 0) {
1266 mutex_unlock(&par->open_lock);
1270 if (par->use_count == 1) {
1271 i810_restore_vga_state(par);
1272 restore_vga(&par->state);
1275 par->use_count--;
1276 mutex_unlock(&par->open_lock);
1286 struct i810fb_par *par = info->par;
1287 u8 __iomem *mmio = par->mmio_start_virtual;
1380 struct i810fb_par *par = info->par;
1383 total = var->xoffset * par->depth +
1392 struct i810fb_par *par = info->par;
1393 u8 __iomem *mmio = par->mmio_start_virtual;
1437 struct i810fb_par *par = info->par;
1439 decode_var(&info->var, par);
1440 i810_load_regs(par);
1441 i810_init_cursor(par);
1444 if (info->var.accel_flags && !(par->dev_flags & LOCKUP)) {
1481 struct i810fb_par *par = info->par;
1482 u8 __iomem *mmio = par->mmio_start_virtual;
1484 if (par->dev_flags & LOCKUP)
1490 if ((i810_readl(CURBASE, mmio) & 0xf) != par->cursor_heap.physical) {
1491 i810_init_cursor(par);
1506 i810_reset_cursor_image(par);
1536 par);
1568 struct i810fb_par *par = info->par;
1570 par->cur_state = mesg.event;
1586 agp_unbind_memory(par->i810_gtt.i810_fb_memory);
1587 agp_unbind_memory(par->i810_gtt.i810_cursor_memory);
1600 struct i810fb_par *par = info->par;
1601 int cur_state = par->cur_state;
1603 par->cur_state = PM_EVENT_ON;
1618 agp_bind_memory(par->i810_gtt.i810_fb_memory,
1619 par->fb.offset);
1620 agp_bind_memory(par->i810_gtt.i810_cursor_memory,
1621 par->cursor_heap.offset);
1633 static void i810_fix_pointers(struct i810fb_par *par)
1635 par->fb.physical = par->aperture.physical+(par->fb.offset << 12);
1636 par->fb.virtual = par->aperture.virtual+(par->fb.offset << 12);
1637 par->iring.physical = par->aperture.physical +
1638 (par->iring.offset << 12);
1639 par->iring.virtual = par->aperture.virtual +
1640 (par->iring.offset << 12);
1641 par->cursor_heap.virtual = par->aperture.virtual+
1642 (par->cursor_heap.offset << 12);
1645 static void i810_fix_offsets(struct i810fb_par *par)
1647 if (vram + 1 > par->aperture.size >> 20)
1648 vram = (par->aperture.size >> 20) - 1;
1649 if (v_offset_default > (par->aperture.size >> 20))
1650 v_offset_default = (par->aperture.size >> 20);
1651 if (vram + v_offset_default + 1 > par->aperture.size >> 20)
1652 v_offset_default = (par->aperture.size >> 20) - (vram + 1);
1654 par->fb.size = vram << 20;
1655 par->fb.offset = v_offset_default << 20;
1656 par->fb.offset >>= 12;
1658 par->iring.offset = par->fb.offset + (par->fb.size >> 12);
1659 par->iring.size = RINGBUFFER_SIZE;
1661 par->cursor_heap.offset = par->iring.offset + (RINGBUFFER_SIZE >> 12);
1662 par->cursor_heap.size = 4096;
1667 struct i810fb_par *par = info->par;
1671 i810_fix_offsets(par);
1672 size = par->fb.size + par->iring.size;
1674 if (!(bridge = agp_backend_acquire(par->dev))) {
1678 if (!(par->i810_gtt.i810_fb_memory =
1685 if (agp_bind_memory(par->i810_gtt.i810_fb_memory,
1686 par->fb.offset)) {
1692 if (!(par->i810_gtt.i810_cursor_memory =
1693 agp_allocate_memory(bridge, par->cursor_heap.size >> 12,
1700 if (agp_bind_memory(par->i810_gtt.i810_cursor_memory,
1701 par->cursor_heap.offset)) {
1707 par->cursor_heap.physical = par->i810_gtt.i810_cursor_memory->physical;
1709 i810_fix_pointers(par);
1757 * @par: pointer to i810fb_par structure
1760 static void i810_init_defaults(struct i810fb_par *par, struct fb_info *info)
1762 mutex_init(&par->open_lock);
1766 else if (par->aperture.size > 32 * 1024 * 1024)
1775 par->dev_flags |= HAS_ACCELERATION;
1778 par->dev_flags |= ALWAYS_SYNC;
1780 par->ddc_num = (ddc3 ? 3 : 2);
1785 par->i810fb_ops = i810fb_ops;
1806 if (par->dev_flags & HAS_ACCELERATION)
1814 * @par: pointer to i810fb_par structure
1816 static void i810_init_device(struct i810fb_par *par)
1819 u8 __iomem *mmio = par->mmio_start_virtual;
1822 par->wc_cookie= arch_phys_wc_add((u32) par->aperture.physical,
1823 par->aperture.size);
1825 i810_init_cursor(par);
1833 pci_read_config_byte(par->dev, 0x50, ®);
1835 par->mem_freq = (reg) ? 133 : 100;
1839 static int i810_allocate_pci_resource(struct i810fb_par *par,
1844 if ((err = pci_enable_device(par->dev))) {
1848 par->res_flags |= PCI_DEVICE_ENABLED;
1850 if (pci_resource_len(par->dev, 0) > 512 * 1024) {
1851 par->aperture.physical = pci_resource_start(par->dev, 0);
1852 par->aperture.size = pci_resource_len(par->dev, 0);
1853 par->mmio_start_phys = pci_resource_start(par->dev, 1);
1855 par->aperture.physical = pci_resource_start(par->dev, 1);
1856 par->aperture.size = pci_resource_len(par->dev, 1);
1857 par->mmio_start_phys = pci_resource_start(par->dev, 0);
1859 if (!par->aperture.size) {
1864 if (!request_mem_region(par->aperture.physical,
1865 par->aperture.size,
1870 par->res_flags |= FRAMEBUFFER_REQ;
1872 par->aperture.virtual = ioremap_wc(par->aperture.physical,
1873 par->aperture.size);
1874 if (!par->aperture.virtual) {
1879 if (!request_mem_region(par->mmio_start_phys,
1885 par->res_flags |= MMIO_REQ;
1887 par->mmio_start_virtual = ioremap(par->mmio_start_phys,
1889 if (!par->mmio_start_virtual) {
1906 struct i810fb_par *par = info->par;
1913 i810_create_i2c_busses(par);
1915 for (i = 0; i < par->ddc_num + 1; i++) {
1916 err = i810_probe_i2c_connector(info, &par->edid, i);
1924 fb_edid_to_monspecs(par->edid, specs);
2016 struct i810fb_par *par = NULL;
2028 par = info->par;
2029 par->dev = dev;
2032 i810fb_release_resource(info, par);
2040 if ((err = i810_allocate_pci_resource(par, entry))) {
2041 i810fb_release_resource(info, par);
2045 i810_init_defaults(par, info);
2048 i810fb_release_resource(info, par);
2052 i810_init_device(par);
2054 info->screen_base = par->fb.virtual;
2055 info->fbops = &par->i810fb_ops;
2056 info->pseudo_palette = par->pseudo_palette;
2061 i810fb_release_resource(info, par);
2072 i810fb_release_resource(info, par);
2092 (int) par->fb.size>>10, info->monspecs.hfmin/1000,
2104 struct i810fb_par *par)
2106 struct gtt_data *gtt = &par->i810_gtt;
2107 arch_phys_wc_del(par->wc_cookie);
2109 i810_delete_i2c_busses(par);
2111 if (par->i810_gtt.i810_cursor_memory)
2113 if (par->i810_gtt.i810_fb_memory)
2116 if (par->mmio_start_virtual)
2117 iounmap(par->mmio_start_virtual);
2118 if (par->aperture.virtual)
2119 iounmap(par->aperture.virtual);
2120 kfree(par->edid);
2121 if (par->res_flags & FRAMEBUFFER_REQ)
2122 release_mem_region(par->aperture.physical,
2123 par->aperture.size);
2124 if (par->res_flags & MMIO_REQ)
2125 release_mem_region(par->mmio_start_phys, MMIO_SIZE);
2134 struct i810fb_par *par = info->par;
2137 i810fb_release_resource(info, par);