Lines Matching defs:par
79 struct geodefb_par *par = info->par;
85 readl(par->dc_regs + DC_UNLOCK);
86 writel(DC_UNLOCK_CODE, par->dc_regs + DC_UNLOCK);
88 gcfg = readl(par->dc_regs + DC_GENERAL_CFG);
89 tcfg = readl(par->dc_regs + DC_TIMING_CFG);
93 writel(tcfg, par->dc_regs + DC_TIMING_CFG);
100 writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
104 writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
106 par->vid_ops->set_dclk(info);
110 writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
131 writel(0, par->dc_regs + DC_FB_ST_OFFSET);
134 writel(info->fix.line_length >> 2, par->dc_regs + DC_LINE_DELTA);
136 par->dc_regs + DC_BUF_SIZE);
162 writel(val, par->dc_regs + DC_H_TIMING_1);
164 writel(val, par->dc_regs + DC_H_TIMING_2);
166 writel(val, par->dc_regs + DC_H_TIMING_3);
167 writel(val, par->dc_regs + DC_FP_H_TIMING);
169 writel(val, par->dc_regs + DC_V_TIMING_1);
171 writel(val, par->dc_regs + DC_V_TIMING_2);
173 writel(val, par->dc_regs + DC_V_TIMING_3);
175 writel(val, par->dc_regs + DC_FP_V_TIMING);
178 writel(ocfg, par->dc_regs + DC_OUTPUT_CFG);
179 writel(tcfg, par->dc_regs + DC_TIMING_CFG);
181 writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
183 par->vid_ops->configure_display(info);
186 writel(0, par->dc_regs + DC_UNLOCK);
195 struct geodefb_par *par = info->par;
203 writel(regno, par->dc_regs + DC_PAL_ADDRESS);
204 writel(val, par->dc_regs + DC_PAL_DATA);