Lines Matching defs:reg_context
1554 } reg_context;
1559 reg_context.clk_enable = lcdc_read(LCD_CLK_ENABLE_REG);
1560 reg_context.int_enable_set = lcdc_read(LCD_INT_ENABLE_SET_REG);
1563 reg_context.ctrl = lcdc_read(LCD_CTRL_REG);
1564 reg_context.dma_ctrl = lcdc_read(LCD_DMA_CTRL_REG);
1565 reg_context.raster_timing_0 = lcdc_read(LCD_RASTER_TIMING_0_REG);
1566 reg_context.raster_timing_1 = lcdc_read(LCD_RASTER_TIMING_1_REG);
1567 reg_context.raster_timing_2 = lcdc_read(LCD_RASTER_TIMING_2_REG);
1568 reg_context.dma_frm_buf_base_addr_0 =
1570 reg_context.dma_frm_buf_ceiling_addr_0 =
1572 reg_context.dma_frm_buf_base_addr_1 =
1574 reg_context.dma_frm_buf_ceiling_addr_1 =
1576 reg_context.raster_ctrl = lcdc_read(LCD_RASTER_CTRL_REG);
1583 lcdc_write(reg_context.clk_enable, LCD_CLK_ENABLE_REG);
1584 lcdc_write(reg_context.int_enable_set, LCD_INT_ENABLE_SET_REG);
1587 lcdc_write(reg_context.ctrl, LCD_CTRL_REG);
1588 lcdc_write(reg_context.dma_ctrl, LCD_DMA_CTRL_REG);
1589 lcdc_write(reg_context.raster_timing_0, LCD_RASTER_TIMING_0_REG);
1590 lcdc_write(reg_context.raster_timing_1, LCD_RASTER_TIMING_1_REG);
1591 lcdc_write(reg_context.raster_timing_2, LCD_RASTER_TIMING_2_REG);
1592 lcdc_write(reg_context.dma_frm_buf_base_addr_0,
1594 lcdc_write(reg_context.dma_frm_buf_ceiling_addr_0,
1596 lcdc_write(reg_context.dma_frm_buf_base_addr_1,
1598 lcdc_write(reg_context.dma_frm_buf_ceiling_addr_1,
1600 lcdc_write(reg_context.raster_ctrl, LCD_RASTER_CTRL_REG);