Lines Matching defs:mode
240 /* these common regs are cleared before mode setting so they do not
903 printk ("radeonfb: mode %dx%dx%d rejected, color depth invalid\n",
1114 /* We don't do a full switch-off on a simple mode switch */
1347 static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *mode)
1362 if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) &&
1363 (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) &
1369 mode->clk_cntl_index & PPLL_DIV_SEL_MASK,
1387 mode->clk_cntl_index & PPLL_DIV_SEL_MASK,
1397 if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) {
1398 /* When restoring console mode, use saved PPLL_REF_DIV
1401 OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, 0);
1405 (mode->ppll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT),
1409 OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, ~PPLL_REF_DIV_MASK);
1412 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK);
1413 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK);
1454 * Apply a video mode. This will apply the whole register set, including
1457 void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
1475 OUTREG(SURFACE0_LOWER_BOUND + 0x10*i, mode->surf_lower_bound[i]);
1476 OUTREG(SURFACE0_UPPER_BOUND + 0x10*i, mode->surf_upper_bound[i]);
1477 OUTREG(SURFACE0_INFO + 0x10*i, mode->surf_info[i]);
1480 OUTREG(CRTC_GEN_CNTL, mode->crtc_gen_cntl);
1481 OUTREGP(CRTC_EXT_CNTL, mode->crtc_ext_cntl,
1483 OUTREG(CRTC_MORE_CNTL, mode->crtc_more_cntl);
1484 OUTREGP(DAC_CNTL, mode->dac_cntl, DAC_RANGE_CNTL | DAC_BLANKING);
1485 OUTREG(CRTC_H_TOTAL_DISP, mode->crtc_h_total_disp);
1486 OUTREG(CRTC_H_SYNC_STRT_WID, mode->crtc_h_sync_strt_wid);
1487 OUTREG(CRTC_V_TOTAL_DISP, mode->crtc_v_total_disp);
1488 OUTREG(CRTC_V_SYNC_STRT_WID, mode->crtc_v_sync_strt_wid);
1491 OUTREG(CRTC_PITCH, mode->crtc_pitch);
1492 OUTREG(SURFACE_CNTL, mode->surface_cntl);
1494 radeon_write_pll_regs(rinfo, mode);
1498 OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp);
1499 OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp);
1500 OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid);
1501 OUTREG(FP_V_SYNC_STRT_WID, mode->fp_v_sync_strt_wid);
1502 OUTREG(FP_HORZ_STRETCH, mode->fp_horz_stretch);
1503 OUTREG(FP_VERT_STRETCH, mode->fp_vert_stretch);
1504 OUTREG(FP_GEN_CNTL, mode->fp_gen_cntl);
1505 OUTREG(TMDS_CRC, mode->tmds_crc);
1506 OUTREG(TMDS_TRANSMITTER_CNTL, mode->tmds_transmitter_cntl);
1513 OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl);
1519 * Calculate the PLL values for a given mode
1641 struct fb_var_screeninfo *mode = &info->var;
1653 int depth = var_to_depth(mode);
1660 /* We always want engine to be idle on a mode switch, even
1661 * if we won't actually change the mode
1665 hSyncStart = mode->xres + mode->right_margin;
1666 hSyncEnd = hSyncStart + mode->hsync_len;
1667 hTotal = hSyncEnd + mode->left_margin;
1669 vSyncStart = mode->yres + mode->lower_margin;
1670 vSyncEnd = vSyncStart + mode->vsync_len;
1671 vTotal = vSyncEnd + mode->upper_margin;
1672 pixClock = mode->pixclock;
1674 sync = mode->sync;
1679 if (rinfo->panel_info.xres < mode->xres)
1680 mode->xres = rinfo->panel_info.xres;
1681 if (rinfo->panel_info.yres < mode->yres)
1682 mode->yres = rinfo->panel_info.yres;
1684 hTotal = mode->xres + rinfo->panel_info.hblank;
1685 hSyncStart = mode->xres + rinfo->panel_info.hOver_plus;
1688 vTotal = mode->yres + rinfo->panel_info.vblank;
1689 vSyncStart = mode->yres + rinfo->panel_info.vOver_plus;
1756 (((mode->xres / 8) - 1) << 16));
1762 ((mode->yres - 1) << 16);
1769 rinfo->pitch = ((mode->xres_virtual * ((mode->bits_per_pixel + 1) / 8) + 0x3f)
1773 newmode->crtc_pitch = (rinfo->pitch << 3) / ((mode->bits_per_pixel + 1) / 8);
1775 newmode->crtc_pitch = (mode->xres_virtual >> 3);
1792 switch (mode->bits_per_pixel) {
1817 rinfo->bpp = mode->bits_per_pixel;
1835 if (mode->xres > rinfo->panel_info.xres)
1836 mode->xres = rinfo->panel_info.xres;
1837 if (mode->yres > rinfo->panel_info.yres)
1838 mode->yres = rinfo->panel_info.yres;
1845 if (mode->xres != rinfo->panel_info.xres) {
1846 hRatio = round_div(mode->xres * HORZ_STRETCH_RATIO_MAX,
1858 if (mode->yres != rinfo->panel_info.yres) {
1859 vRatio = round_div(mode->yres * VERT_STRETCH_RATIO_MAX,
1916 (((mode->xres / 8) - 1) << 16));
1918 ((mode->yres - 1) << 16);
1937 info->fix.line_length = mode->xres_virtual
1938 * ((mode->bits_per_pixel + 1) / 8);
1944 btext_update_display(rinfo->fb_base_phys, mode->xres, mode->yres,
2225 .mode = 0444,
2234 .mode = 0444,
2422 /* Build mode list, check out panel native model */
2436 /* save current mode regs before we switch into the new one
2630 MODULE_PARM_DESC(nomodeset, "bool: disable actual setting of video mode");
2649 MODULE_PARM_DESC(force_sleep, "bool: force D2 sleep mode on all hardware");