Lines Matching defs:lcd
11 #include <linux/lcd.h>
36 static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
50 lcd->buffer[0] = LTV_OPC_INDEX;
51 lcd->buffer[1] = 0x00;
52 lcd->buffer[2] = reg & 0x7f;
53 index_xfer.tx_buf = lcd->buffer;
57 lcd->buffer[4] = LTV_OPC_DATA;
58 lcd->buffer[5] = val >> 8;
59 lcd->buffer[6] = val;
60 value_xfer.tx_buf = lcd->buffer + 4;
63 return spi_sync(lcd->spi, &msg);
67 static int ltv350qv_power_on(struct ltv350qv *lcd)
72 if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
77 if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
79 if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
83 if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
91 ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
93 ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
96 ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
102 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
103 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
105 ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
106 ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
107 ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
108 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
109 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
110 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
111 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
112 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
113 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
114 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
115 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
116 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
117 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
125 ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
129 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
143 ltv350qv_write_reg(lcd, LTV_PWRCTL1,
146 ltv350qv_write_reg(lcd, LTV_GATECTL2,
151 ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
154 ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
158 static int ltv350qv_power_off(struct ltv350qv *lcd)
163 ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
167 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
171 ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
177 ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
191 static int ltv350qv_power(struct ltv350qv *lcd, int power)
195 if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
196 ret = ltv350qv_power_on(lcd);
197 else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
198 ret = ltv350qv_power_off(lcd);
201 lcd->power = power;
208 struct ltv350qv *lcd = lcd_get_data(ld);
210 return ltv350qv_power(lcd, power);
215 struct ltv350qv *lcd = lcd_get_data(ld);
217 return lcd->power;
227 struct ltv350qv *lcd;
231 lcd = devm_kzalloc(&spi->dev, sizeof(struct ltv350qv), GFP_KERNEL);
232 if (!lcd)
235 lcd->spi = spi;
236 lcd->power = FB_BLANK_POWERDOWN;
237 lcd->buffer = devm_kzalloc(&spi->dev, 8, GFP_KERNEL);
238 if (!lcd->buffer)
241 ld = devm_lcd_device_register(&spi->dev, "ltv350qv", &spi->dev, lcd,
246 lcd->ld = ld;
248 ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
252 spi_set_drvdata(spi, lcd);
259 struct ltv350qv *lcd = spi_get_drvdata(spi);
261 ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
267 struct ltv350qv *lcd = dev_get_drvdata(dev);
269 return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
274 struct ltv350qv *lcd = dev_get_drvdata(dev);
276 return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
285 struct ltv350qv *lcd = spi_get_drvdata(spi);
287 ltv350qv_power(lcd, FB_BLANK_POWERDOWN);