Lines Matching defs:byte
798 * Write through to emulation. If the write includes the upper byte
1207 * The upper byte of the control register is reserved,
1208 * just setup the lower byte.
1309 u8 byte;
1332 ret = pci_read_config_byte(pdev, pos + PCI_CAP_FLAGS, &byte);
1336 return byte;
1355 ret = pci_read_config_byte(pdev, pos + 3, &byte);
1359 return (byte & HT_3BIT_CAP_MASK) ?
1362 ret = pci_read_config_byte(pdev, pos + PCI_SATA_REGS, &byte);
1366 byte &= PCI_SATA_REGS_MASK;
1367 if (byte == PCI_SATA_REGS_INLINE)
1382 u8 byte;
1398 ret = pci_read_config_byte(pdev, epos + PCI_ACS_CAP, &byte);
1402 if (byte & PCI_ACS_EC) {
1407 &byte);
1411 bits = byte ? round_up(byte, 32) : 256;
1417 ret = pci_read_config_byte(pdev, epos + PCI_REBAR_CTRL, &byte);
1421 byte &= PCI_REBAR_CTRL_NBAR_MASK;
1422 byte >>= PCI_REBAR_CTRL_NBAR_SHIFT;
1424 return 4 + (byte * 8);
1426 ret = pci_read_config_byte(pdev, epos + PCI_DPA_CAP, &byte);
1430 byte &= PCI_DPA_CAP_SUBSTATE_MASK;
1431 return PCI_DPA_BASE_SIZEOF + byte + 1;
1502 u8 *byte = &vdev->vconfig[offset];
1503 ret = pci_read_config_byte(pdev, offset, byte);
1675 * from exceeding 1 byte capabilities. If we ever make it
1676 * up to 0xFE we'll need to up this to a two-byte, byte map.
1737 * use one byte per dword to record the type. However, there are
1739 * capabilities needs byte granularity.