Lines Matching refs:base
223 void __iomem *base = phy->regs;
227 val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
230 writel_relaxed(val, base + TEGRA_USB_HOSTPC1_DEVLC);
232 val = readl_relaxed(base + TEGRA_USB_PORTSC1);
236 writel_relaxed(val, base + TEGRA_USB_PORTSC1);
242 void __iomem *base = phy->regs;
246 val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
251 writel_relaxed(val, base + TEGRA_USB_HOSTPC1_DEVLC);
253 val = readl_relaxed(base + TEGRA_USB_PORTSC1) & ~PORT_RWC_BITS;
258 writel_relaxed(val, base + TEGRA_USB_PORTSC1);
329 void __iomem *base = phy->pad_regs;
340 val = readl_relaxed(base + UTMIP_BIAS_CFG0);
352 writel_relaxed(val, base + UTMIP_BIAS_CFG0);
369 void __iomem *base = phy->pad_regs;
397 val = readl_relaxed(base + UTMIP_BIAS_CFG0);
399 writel_relaxed(val, base + UTMIP_BIAS_CFG0);
419 void __iomem *base = phy->regs;
427 if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID, 0) == 0)
431 val = readl_relaxed(base + USB_SUSP_CTRL);
433 writel_relaxed(val, base + USB_SUSP_CTRL);
437 val = readl_relaxed(base + USB_SUSP_CTRL);
439 writel_relaxed(val, base + USB_SUSP_CTRL);
444 if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID, 0))
451 void __iomem *base = phy->regs;
459 if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
464 val = readl_relaxed(base + USB_SUSP_CTRL);
466 writel_relaxed(val, base + USB_SUSP_CTRL);
470 val = readl_relaxed(base + USB_SUSP_CTRL);
472 writel_relaxed(val, base + USB_SUSP_CTRL);
477 if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
486 void __iomem *base = phy->regs;
490 val = readl_relaxed(base + USB_SUSP_CTRL);
492 writel_relaxed(val, base + USB_SUSP_CTRL);
495 val = readl_relaxed(base + USB1_LEGACY_CTRL);
497 writel_relaxed(val, base + USB1_LEGACY_CTRL);
500 val = readl_relaxed(base + UTMIP_TX_CFG0);
502 writel_relaxed(val, base + UTMIP_TX_CFG0);
504 val = readl_relaxed(base + UTMIP_HSRX_CFG0);
508 writel_relaxed(val, base + UTMIP_HSRX_CFG0);
510 val = readl_relaxed(base + UTMIP_HSRX_CFG1);
513 writel_relaxed(val, base + UTMIP_HSRX_CFG1);
515 val = readl_relaxed(base + UTMIP_DEBOUNCE_CFG0);
518 writel_relaxed(val, base + UTMIP_DEBOUNCE_CFG0);
520 val = readl_relaxed(base + UTMIP_MISC_CFG0);
522 writel_relaxed(val, base + UTMIP_MISC_CFG0);
525 val = readl_relaxed(base + UTMIP_MISC_CFG1);
530 writel_relaxed(val, base + UTMIP_MISC_CFG1);
532 val = readl_relaxed(base + UTMIP_PLL_CFG1);
537 writel_relaxed(val, base + UTMIP_PLL_CFG1);
540 val = readl_relaxed(base + USB_SUSP_CTRL);
542 writel_relaxed(val, base + USB_SUSP_CTRL);
545 val = readl_relaxed(base + USB_SUSP_CTRL);
547 writel_relaxed(val, base + USB_SUSP_CTRL);
549 val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
552 writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID);
554 val = readl_relaxed(base + USB_PHY_VBUS_SENSORS);
557 writel_relaxed(val, base + USB_PHY_VBUS_SENSORS);
559 val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
561 writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);
563 val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
565 writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);
572 val = readl_relaxed(base + UTMIP_XCVR_CFG0);
590 writel_relaxed(val, base + UTMIP_XCVR_CFG0);
592 val = readl_relaxed(base + UTMIP_XCVR_CFG1);
596 writel_relaxed(val, base + UTMIP_XCVR_CFG1);
598 val = readl_relaxed(base + UTMIP_BIAS_CFG1);
601 writel_relaxed(val, base + UTMIP_BIAS_CFG1);
603 val = readl_relaxed(base + UTMIP_SPARE_CFG0);
608 writel_relaxed(val, base + UTMIP_SPARE_CFG0);
611 val = readl_relaxed(base + USB_SUSP_CTRL);
613 writel_relaxed(val, base + USB_SUSP_CTRL);
616 val = readl_relaxed(base + USB_SUSP_CTRL);
618 writel_relaxed(val, base + USB_SUSP_CTRL);
621 val = readl_relaxed(base + USB1_LEGACY_CTRL);
624 writel_relaxed(val, base + USB1_LEGACY_CTRL);
626 val = readl_relaxed(base + USB_SUSP_CTRL);
628 writel_relaxed(val, base + USB_SUSP_CTRL);
634 val = readl_relaxed(base + USB_USBMODE);
640 writel_relaxed(val, base + USB_USBMODE);
651 void __iomem *base = phy->regs;
659 readl_relaxed_poll_timeout(base + USB_PHY_VBUS_WAKEUP_ID,
667 val = readl_relaxed(base + USB_SUSP_CTRL);
669 writel_relaxed(val, base + USB_SUSP_CTRL);
672 val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
674 writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);
677 val = readl_relaxed(base + UTMIP_XCVR_CFG0);
680 writel_relaxed(val, base + UTMIP_XCVR_CFG0);
683 val = readl_relaxed(base + UTMIP_XCVR_CFG1);
686 writel_relaxed(val, base + UTMIP_XCVR_CFG1);
689 val = readl_relaxed(base + USB_SUSP_CTRL);
693 writel_relaxed(val, base + USB_SUSP_CTRL);
700 val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
703 writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID);
705 val = readl_relaxed(base + USB_PHY_VBUS_SENSORS);
707 writel_relaxed(val, base + USB_PHY_VBUS_SENSORS);
716 void __iomem *base = phy->regs;
719 val = readl_relaxed(base + UTMIP_TX_CFG0);
721 writel_relaxed(val, base + UTMIP_TX_CFG0);
726 void __iomem *base = phy->regs;
729 val = readl_relaxed(base + UTMIP_TX_CFG0);
731 writel_relaxed(val, base + UTMIP_TX_CFG0);
737 void __iomem *base = phy->regs;
740 val = readl_relaxed(base + UTMIP_MISC_CFG0);
746 writel_relaxed(val, base + UTMIP_MISC_CFG0);
749 val = readl_relaxed(base + UTMIP_MISC_CFG0);
751 writel_relaxed(val, base + UTMIP_MISC_CFG0);
757 void __iomem *base = phy->regs;
760 val = readl_relaxed(base + UTMIP_MISC_CFG0);
762 writel_relaxed(val, base + UTMIP_MISC_CFG0);
768 void __iomem *base = phy->regs;
784 val = readl_relaxed(base + USB_SUSP_CTRL);
786 writel_relaxed(val, base + USB_SUSP_CTRL);
788 val = readl_relaxed(base + ULPI_TIMING_CTRL_0);
790 writel_relaxed(val, base + ULPI_TIMING_CTRL_0);
792 val = readl_relaxed(base + USB_SUSP_CTRL);
794 writel_relaxed(val, base + USB_SUSP_CTRL);
797 writel_relaxed(val, base + ULPI_TIMING_CTRL_1);
802 writel_relaxed(val, base + ULPI_TIMING_CTRL_1);
808 writel_relaxed(val, base + ULPI_TIMING_CTRL_1);
823 val = readl_relaxed(base + USB_SUSP_CTRL);
825 writel_relaxed(val, base + USB_SUSP_CTRL);
828 val = readl_relaxed(base + USB_SUSP_CTRL);
830 writel_relaxed(val, base + USB_SUSP_CTRL);
922 void __iomem *base = phy->regs;
929 val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
930 writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID);
938 void __iomem *base = phy->regs;
946 val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
948 writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID);
968 val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
970 writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID);