Lines Matching refs:cppi41_channel
49 void (*set_dma_mode)(struct cppi41_dma_channel *cppi41_channel,
54 static void save_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
59 if (cppi41_channel->is_tx)
61 if (!is_host_active(cppi41_channel->controller->controller.musb))
64 csr = musb_readw(cppi41_channel->hw_ep->regs, MUSB_RXCSR);
67 cppi41_channel->usb_toggle = toggle;
70 static void update_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
72 struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
77 if (cppi41_channel->is_tx)
91 if (!toggle && toggle == cppi41_channel->usb_toggle) {
93 musb_writew(cppi41_channel->hw_ep->regs, MUSB_RXCSR, csr);
97 cppi41_channel->usb_toggle = toggle;
117 static void cppi41_trans_done(struct cppi41_dma_channel *cppi41_channel)
119 struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
124 if (!cppi41_channel->prog_len ||
125 (cppi41_channel->channel.status == MUSB_DMA_STATUS_FREE)) {
128 cppi41_channel->channel.actual_len =
129 cppi41_channel->transferred;
130 cppi41_channel->channel.status = MUSB_DMA_STATUS_FREE;
131 cppi41_channel->channel.rx_packet_done = true;
137 if (cppi41_channel->tx_zlp && (cppi41_channel->transferred %
138 cppi41_channel->packet_sz) == 0) {
144 trace_musb_cppi41_done(cppi41_channel);
145 musb_dma_completion(musb, hw_ep->epnum, cppi41_channel->is_tx);
148 struct dma_chan *dc = cppi41_channel->dc;
153 cppi41_channel->buf_addr += cppi41_channel->packet_sz;
155 remain_bytes = cppi41_channel->total_len;
156 remain_bytes -= cppi41_channel->transferred;
157 remain_bytes = min(remain_bytes, cppi41_channel->packet_sz);
158 cppi41_channel->prog_len = remain_bytes;
160 direction = cppi41_channel->is_tx ? DMA_MEM_TO_DEV
163 cppi41_channel->buf_addr,
171 dma_desc->callback_param = &cppi41_channel->channel;
172 cppi41_channel->cookie = dma_desc->tx_submit(dma_desc);
173 trace_musb_cppi41_cont(cppi41_channel);
176 if (!cppi41_channel->is_tx) {
188 struct cppi41_dma_channel *cppi41_channel, *n;
198 list_for_each_entry_safe(cppi41_channel, n, &controller->early_tx_list,
201 struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
205 list_del_init(&cppi41_channel->tx_check);
206 cppi41_trans_done(cppi41_channel);
224 struct cppi41_dma_channel *cppi41_channel = channel->private_data;
225 struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
234 controller = cppi41_channel->controller;
243 dmaengine_tx_status(cppi41_channel->dc, cppi41_channel->cookie,
245 transferred = cppi41_channel->prog_len - txstate.residue;
246 cppi41_channel->transferred += transferred;
248 trace_musb_cppi41_gb(cppi41_channel);
249 update_rx_toggle(cppi41_channel);
251 if (cppi41_channel->transferred == cppi41_channel->total_len ||
252 transferred < cppi41_channel->packet_sz)
253 cppi41_channel->prog_len = 0;
255 if (cppi41_channel->is_tx) {
277 if (!cppi41_channel->is_tx || empty) {
278 cppi41_trans_done(cppi41_channel);
305 cppi41_trans_done(cppi41_channel);
314 list_add_tail(&cppi41_channel->tx_check,
317 unsigned long usecs = cppi41_channel->total_len / 10;
339 static void cppi41_set_dma_mode(struct cppi41_dma_channel *cppi41_channel,
342 struct cppi41_dma_controller *controller = cppi41_channel->controller;
348 if (cppi41_channel->is_tx)
352 port = cppi41_channel->port_num;
357 if (cppi41_channel->is_tx) {
366 static void da8xx_set_dma_mode(struct cppi41_dma_channel *cppi41_channel,
369 struct cppi41_dma_controller *controller = cppi41_channel->controller;
377 port = cppi41_channel->port_num;
380 if (!cppi41_channel->is_tx)
392 static void cppi41_set_autoreq_mode(struct cppi41_dma_channel *cppi41_channel,
395 struct cppi41_dma_controller *controller = cppi41_channel->controller;
401 port = cppi41_channel->port_num;
415 struct cppi41_dma_channel *cppi41_channel = channel->private_data;
416 struct cppi41_dma_controller *controller = cppi41_channel->controller;
417 struct dma_chan *dc = cppi41_channel->dc;
420 struct musb *musb = cppi41_channel->controller->controller.musb;
423 cppi41_channel->buf_addr = dma_addr;
424 cppi41_channel->total_len = len;
425 cppi41_channel->transferred = 0;
426 cppi41_channel->packet_sz = packet_sz;
427 cppi41_channel->tx_zlp = (cppi41_channel->is_tx && mode) ? 1 : 0;
433 if (cppi41_channel->is_tx)
440 RNDIS_REG(cppi41_channel->port_num), len);
442 controller->set_dma_mode(cppi41_channel,
446 cppi41_set_autoreq_mode(cppi41_channel,
450 RNDIS_REG(cppi41_channel->port_num), 0);
451 controller->set_dma_mode(cppi41_channel,
453 cppi41_set_autoreq_mode(cppi41_channel,
458 controller->set_dma_mode(cppi41_channel,
460 cppi41_set_autoreq_mode(cppi41_channel, EP_MODE_AUTOREQ_NONE);
463 cppi41_channel->prog_len = len;
464 direction = cppi41_channel->is_tx ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
472 cppi41_channel->cookie = dma_desc->tx_submit(dma_desc);
473 cppi41_channel->channel.rx_packet_done = false;
475 trace_musb_cppi41_config(cppi41_channel);
477 save_rx_toggle(cppi41_channel);
487 struct cppi41_dma_channel *cppi41_channel = NULL;
494 cppi41_channel = &controller->tx_channel[ch_num];
496 cppi41_channel = &controller->rx_channel[ch_num];
498 if (!cppi41_channel->dc)
501 if (cppi41_channel->is_allocated)
504 cppi41_channel->hw_ep = hw_ep;
505 cppi41_channel->is_allocated = 1;
507 trace_musb_cppi41_alloc(cppi41_channel);
508 return &cppi41_channel->channel;
513 struct cppi41_dma_channel *cppi41_channel = channel->private_data;
515 trace_musb_cppi41_free(cppi41_channel);
516 if (cppi41_channel->is_allocated) {
517 cppi41_channel->is_allocated = 0;
528 struct cppi41_dma_channel *cppi41_channel = channel->private_data;
534 if (is_host_active(cppi41_channel->controller->controller.musb)) {
535 if (cppi41_channel->is_tx)
536 hb_mult = cppi41_channel->hw_ep->out_qh->hb_mult;
538 hb_mult = cppi41_channel->hw_ep->in_qh->hb_mult;
557 struct cppi41_dma_channel *cppi41_channel = channel->private_data;
558 struct cppi41_dma_controller *controller = cppi41_channel->controller;
565 if (cppi41_channel->hw_ep->ep_in.type != USB_ENDPOINT_XFER_BULK)
567 if (cppi41_channel->is_tx)
575 struct cppi41_dma_channel *cppi41_channel = channel->private_data;
576 struct cppi41_dma_controller *controller = cppi41_channel->controller;
578 void __iomem *epio = cppi41_channel->hw_ep->regs;
584 is_tx = cppi41_channel->is_tx;
585 trace_musb_cppi41_abort(cppi41_channel);
587 if (cppi41_channel->channel.status == MUSB_DMA_STATUS_FREE)
590 list_del_init(&cppi41_channel->tx_check);
596 cppi41_set_autoreq_mode(cppi41_channel, EP_MODE_AUTOREQ_NONE);
620 tdbit = 1 << cppi41_channel->port_num;
628 ret = dmaengine_terminate_all(cppi41_channel->dc);
641 cppi41_channel->channel.status = MUSB_DMA_STATUS_FREE;
670 struct cppi41_dma_channel *cppi41_channel;
705 cppi41_channel = &controller->tx_channel[port - 1];
707 cppi41_channel = &controller->rx_channel[port - 1];
709 cppi41_channel->controller = controller;
710 cppi41_channel->port_num = port;
711 cppi41_channel->is_tx = is_tx;
712 INIT_LIST_HEAD(&cppi41_channel->tx_check);
714 musb_dma = &cppi41_channel->channel;
715 musb_dma->private_data = cppi41_channel;
726 cppi41_channel->dc = dc;