Lines Matching refs:tmp8
1355 u8 tmp8;
1357 ret = GETIREG(SISSR, 0x16, &tmp8);
1359 tmp8 &= 0x3f;
1360 ret |= SETIREG(SISSR, 0x16, tmp8);
1361 tmp8 |= 0x80;
1362 ret |= SETIREG(SISSR, 0x16, tmp8);
1364 tmp8 |= 0xc0;
1365 ret |= SETIREG(SISSR, 0x16, tmp8);
1366 tmp8 &= 0x0f;
1367 ret |= SETIREG(SISSR, 0x16, tmp8);
1368 tmp8 |= 0x80;
1369 ret |= SETIREG(SISSR, 0x16, tmp8);
1370 tmp8 &= 0x0f;
1371 ret |= SETIREG(SISSR, 0x16, tmp8);
1372 tmp8 |= 0xd0;
1373 ret |= SETIREG(SISSR, 0x16, tmp8);
1374 tmp8 &= 0x0f;
1375 ret |= SETIREG(SISSR, 0x16, tmp8);
1376 tmp8 |= 0xa0;
1377 ret |= SETIREG(SISSR, 0x16, tmp8);
1696 u8 sr31, cr63, tmp8;
1737 GETREG(SISINPSTAT, &tmp8);
1741 GETREG(SISINPSTAT, &tmp8);
1744 GETREG(SISINPSTAT, &tmp8);
1746 GETREG(SISINPSTAT, &tmp8);
1776 tmp8 = du >> 8;
1777 SETIREG(SISSR, 0x10, tmp8);
1823 u8 tmp8, ramtype;
1857 ret = GETREG(SISVGAEN, &tmp8);
1858 ret |= SETREG(SISVGAEN, (tmp8 | 0x01));
1861 ret |= GETREG(SISMISCR, &tmp8);
1862 ret |= SETREG(SISMISCW, (tmp8 | 0x01));
1939 ret |= GETIREG(SISSR, 0x13, &tmp8);
1940 tmp8 >>= 4;
1947 tmp8 = (tmp32 == 0x100000) ? 0x33 : 0x03;
1948 ret |= SETIREG(SISSR, 0x25, tmp8);
1949 tmp8 = (tmp32 == 0x100000) ? 0xaa : 0x88;
1950 ret |= SETIREG(SISCR, 0x49, tmp8);
2021 u8 tmp8, tmp82, ramtype;
2030 sisusb_getidxreg(sisusb, SISSR, 0x14, &tmp8);
2033 sisusb->vramsize = (1 << ((tmp8 & 0xf0) >> 4)) * 1024 * 1024;
2035 switch ((tmp8 >> 2) & 0x03) {
2041 bw = busSDR[(tmp8 & 0x03)];
2047 bw = busSDR[(tmp8 & 0x03)];
2052 bw = busDDRA[(tmp8 & 0x03)];
2057 bw = busDDR[(tmp8 & 0x03)];