Lines Matching refs:base
36 void __iomem *base;
46 writel(EUD_ENABLE, priv->base + EUD_REG_CSR_EUD_EN);
48 priv->base + EUD_REG_INT1_EN_MASK);
56 writel(0, priv->base + EUD_REG_CSR_EUD_EN);
105 reg = readl(chip->base + EUD_REG_CTL_OUT_1);
118 reg = readl(chip->base + EUD_REG_SW_ATTACH_DET);
121 writel(0, chip->base + EUD_REG_SW_ATTACH_DET);
123 ret = readl_poll_timeout(chip->base + EUD_REG_SW_ATTACH_DET,
131 writel(EUD_INT_PET_EUD, chip->base + EUD_REG_SW_ATTACH_DET);
139 reg = readl(chip->base + EUD_REG_INT_STATUS_1);
165 writel(BIT(0), chip->base + EUD_REG_VBUS_INT_CLR);
166 writel(0, chip->base + EUD_REG_VBUS_INT_CLR);
199 chip->base = devm_platform_ioremap_resource(pdev, 0);
200 if (IS_ERR(chip->base))
201 return PTR_ERR(chip->base);