Lines Matching refs:ptd
58 struct ptd {
158 /* QTD_XFER_STARTED: valid ptd has been written to isp176x - only
313 * For access to ptd memory, use the specialized ptd_read() and ptd_write()
494 struct ptd *ptd)
496 u16 src_offset = ptd_offset + slot * sizeof(*ptd);
502 bank_reads8(priv->base, src_offset, ISP_BANK_0, (void *)ptd,
503 sizeof(*ptd));
507 struct ptd *ptd)
509 u16 src_offset = ptd_offset + slot * sizeof(*ptd);
514 ptd->dw0 = le32_to_dw(le32_ptd.dw0);
515 ptd->dw1 = le32_to_dw(le32_ptd.dw1);
516 ptd->dw2 = le32_to_dw(le32_ptd.dw2);
517 ptd->dw3 = le32_to_dw(le32_ptd.dw3);
518 ptd->dw4 = le32_to_dw(le32_ptd.dw4);
519 ptd->dw5 = le32_to_dw(le32_ptd.dw5);
520 ptd->dw6 = le32_to_dw(le32_ptd.dw6);
521 ptd->dw7 = le32_to_dw(le32_ptd.dw7);
525 struct ptd *ptd)
530 return isp1760_ptd_read(hcd, ptd_offset, slot, ptd);
532 isp1763_ptd_read(hcd, ptd_offset, slot, ptd);
536 struct ptd *cpu_ptd)
539 struct ptd_le32 ptd;
541 ptd.dw0 = dw_to_le32(cpu_ptd->dw0);
542 ptd.dw1 = dw_to_le32(cpu_ptd->dw1);
543 ptd.dw2 = dw_to_le32(cpu_ptd->dw2);
544 ptd.dw3 = dw_to_le32(cpu_ptd->dw3);
545 ptd.dw4 = dw_to_le32(cpu_ptd->dw4);
546 ptd.dw5 = dw_to_le32(cpu_ptd->dw5);
547 ptd.dw6 = dw_to_le32(cpu_ptd->dw6);
548 ptd.dw7 = dw_to_le32(cpu_ptd->dw7);
550 isp1763_mem_write(hcd, dst_offset, (u16 *)&ptd.dw0,
551 8 * sizeof(ptd.dw0));
555 struct ptd *ptd)
557 u32 dst_offset = ptd_offset + slot * sizeof(*ptd);
563 isp1760_mem_write(base, dst_offset + sizeof(ptd->dw0),
564 (__force u32 *)&ptd->dw1, 7 * sizeof(ptd->dw1));
566 isp1760_mem_write(base, dst_offset, (__force u32 *)&ptd->dw0,
567 sizeof(ptd->dw0));
571 struct ptd *ptd)
576 return isp1760_ptd_write(priv->base, ptd_offset, slot, ptd);
578 isp1763_ptd_write(hcd, ptd_offset, slot, ptd);
818 struct isp1760_qtd *qtd, struct ptd *ptd)
825 memset(ptd, 0, sizeof(*ptd));
833 ptd->dw0 = DW0_VALID_BIT;
834 ptd->dw0 |= TO_DW0_LENGTH(qtd->length);
835 ptd->dw0 |= TO_DW0_MAXPACKET(maxpacket);
836 ptd->dw0 |= TO_DW0_ENDPOINT(usb_pipeendpoint(qtd->urb->pipe));
839 ptd->dw1 = TO_DW((usb_pipeendpoint(qtd->urb->pipe) >> 1));
840 ptd->dw1 |= TO_DW1_DEVICE_ADDR(usb_pipedevice(qtd->urb->pipe));
841 ptd->dw1 |= TO_DW1_PID_TOKEN(qtd->packet_type);
844 ptd->dw1 |= DW1_TRANS_BULK;
846 ptd->dw1 |= DW1_TRANS_INT;
851 ptd->dw1 |= DW1_TRANS_SPLIT;
853 ptd->dw1 |= DW1_SE_USB_LOSPEED;
855 ptd->dw1 |= TO_DW1_PORT_NUM(qtd->urb->dev->ttport);
856 ptd->dw1 |= TO_DW1_HUB_NUM(qtd->urb->dev->tt->hub->devnum);
861 ptd->dw1 |= DW1_SE_USB_LOSPEED;
866 ptd->dw0 |= TO_DW0_MULTI(multi);
869 ptd->dw3 |= TO_DW3_PING(qh->ping);
872 ptd->dw2 = 0;
873 ptd->dw2 |= TO_DW2_DATA_START_ADDR(base_to_chip(qtd->payload_addr));
874 ptd->dw2 |= TO_DW2_RL(rl);
877 ptd->dw3 |= TO_DW3_NAKCOUNT(nak);
878 ptd->dw3 |= TO_DW3_DATA_TOGGLE(qh->toggle);
881 ptd->dw3 &= ~TO_DW3_DATA_TOGGLE(1);
883 ptd->dw3 |= TO_DW3_DATA_TOGGLE(1);
886 ptd->dw3 |= DW3_ACTIVE_BIT;
888 ptd->dw3 |= TO_DW3_CERR(ERR_COUNTER);
892 struct isp1760_qtd *qtd, struct ptd *ptd)
932 /* ptd->dw5 = 0x1c; */
933 ptd->dw5 = TO_DW(0xff); /* Execute Complete Split on any uFrame */
939 ptd->dw2 |= TO_DW(period);
940 ptd->dw4 = TO_DW(usof);
944 struct isp1760_qtd *qtd, struct ptd *ptd)
946 create_ptd_atl(qh, qtd, ptd);
947 transform_add_int(qh, qtd, ptd);
1003 struct ptd *ptd)
1039 ptd_write(hcd, ptd_offset, slot, ptd);
1125 struct ptd ptd;
1180 create_ptd_int(qh, qtd, &ptd);
1182 create_ptd_atl(qh, qtd, &ptd);
1185 slots, qtd, qh, &ptd);
1265 static int check_int_transfer(struct usb_hcd *hcd, struct ptd *ptd,
1271 dw4 = TO_U32(ptd->dw4);
1277 if (ptd->dw3 & DW3_HALT_BIT) {
1312 static int check_atl_transfer(struct usb_hcd *hcd, struct ptd *ptd,
1315 WARN_ON(!ptd);
1316 if (ptd->dw3 & DW3_HALT_BIT) {
1317 if (ptd->dw3 & DW3_BABBLE_BIT)
1319 else if (FROM_DW3_CERR(ptd->dw3))
1324 dev_dbg(hcd->self.controller, "%s: ptd error:\n"
1328 ptd->dw0, ptd->dw1, ptd->dw2, ptd->dw3,
1329 ptd->dw4, ptd->dw5, ptd->dw6, ptd->dw7);
1334 if ((ptd->dw3 & DW3_ERROR_BIT) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
1336 dev_dbg(hcd->self.controller, "PID error; reloading ptd\n");
1340 if (!FROM_DW3_NAKCOUNT(ptd->dw3) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
1355 struct ptd ptd;
1374 /* INT ptd */
1385 ptd_read(hcd, INT_PTD_OFFSET, slot, &ptd);
1386 state = check_int_transfer(hcd, &ptd,
1389 /* ATL ptd */
1400 ptd_read(hcd, ATL_PTD_OFFSET, slot, &ptd);
1401 state = check_atl_transfer(hcd, &ptd,
1418 FROM_DW3_SCS_NRBYTESTRANSFERRED(ptd.dw3);
1421 FROM_DW3_NRBYTESTRANSFERRED(ptd.dw3);
1431 qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
1432 qh->ping = FROM_DW3_PING(ptd.dw3);
1437 ptd.dw0 |= DW0_VALID_BIT;
1439 ptd.dw3 &= ~TO_DW3_NAKCOUNT(0xf);
1440 ptd.dw3 |= TO_DW3_NAKCOUNT(FROM_DW2_RL(ptd.dw2));
1441 ptd.dw3 &= ~TO_DW3_CERR(3);
1442 ptd.dw3 |= TO_DW3_CERR(ERR_COUNTER);
1443 qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
1444 qh->ping = FROM_DW3_PING(ptd.dw3);
1475 create_ptd_int(qh, qtd, &ptd);
1478 create_ptd_atl(qh, qtd, &ptd);
1482 qh, &ptd);
1535 * If we use SOF interrupts only, we get latency between ptd completion and the
1541 * slot's ACTIVE and VALID bits. If these are not set, the ptd is considered
1559 struct ptd ptd;
1568 ptd_read(hcd, ATL_PTD_OFFSET, slot, &ptd);
1569 if (!FROM_DW0_VALID(ptd.dw0) &&
1570 !FROM_DW3_ACTIVE(ptd.dw3))