Lines Matching defs:state
87 /* bit 26 Scratchpad restore - for save/restore HW state - not used yet */
176 * Link PM state and control) for USB 2.1 and USB 3.0
205 /* Reset HC - resets internal HC state machine and all registers (except
217 /* host controller save/restore state. */
225 * disabled, or powered-off state.
249 /* save state status - '1' means xHC is saving state */
251 /* restore state status - '1' means xHC is restoring state */
274 /* bit 0 is the command ring cycle state */
305 * A read gives the current link PM state of the port,
306 * a write with Link State Write Strobe set sets the link state.
359 /* Port Link State Write Strobe - set this when changing link state */
366 * into an enabled state, and the device into the default state. A "warm" reset
375 /* port link status change - set on some port link state transitions:
386 * - Any state to inactive Error on USB 3.0 port
396 * Sx state. Warm port reset should be perfomed to clear this bit and move port
397 * to connected state.
619 * @dev_state: slot state and device address
681 /* Slot state */
693 * @ep_info: endpoint state, streams, mult, and interval information.
811 /* Input context for changing device state */
829 /* 64-bit stream ring address, cycle state, and stream type */
936 * have to restore the device state to the previous state
1028 * flags for state tracking based on events and issued commands.
1630 * Write the cycle state into the TRB cycle field to give ownership of
2226 u32 xhci_port_state_to_neutral(u32 state);
2265 static inline char *xhci_slot_state_string(u32 state)
2267 switch (state) {
2534 u32 info, u32 info2, u32 tt_info, u32 state)
2577 state & DEV_ADDR_MASK,
2578 xhci_slot_state_string(GET_SLOT_STATE(state)));
2723 static inline const char *xhci_ep_state_string(u8 state)
2725 switch (state) {