Lines Matching defs:pm_val
4362 u32 pm_val, hlpm_val, field;
4387 pm_val = readl(pm_addr);
4424 pm_val &= ~PORT_HIRD_MASK;
4425 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4426 writel(pm_val, pm_addr);
4427 pm_val = readl(pm_addr);
4428 pm_val |= PORT_HLE;
4429 writel(pm_val, pm_addr);
4433 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4434 writel(pm_val, pm_addr);
4440 readl_poll_timeout(ports[port_num]->addr, pm_val,
4441 (pm_val & PORT_PLS_MASK) == XDEV_U0,