Lines Matching refs:tegra
20 #include <linux/phy/tegra/xusb.h>
32 #include <soc/tegra/pmc.h>
218 u32 (*mbox_reg_readl)(struct tegra_xusb *tegra, unsigned int offset);
219 void (*mbox_reg_writel)(struct tegra_xusb *tegra, u32 value, unsigned int offset);
220 u32 (*csb_reg_readl)(struct tegra_xusb *tegra, unsigned int offset);
221 void (*csb_reg_writel)(struct tegra_xusb *tegra, u32 value, unsigned int offset);
319 static inline u32 fpci_readl(struct tegra_xusb *tegra, unsigned int offset)
321 return readl(tegra->fpci_base + offset);
324 static inline void fpci_writel(struct tegra_xusb *tegra, u32 value,
327 writel(value, tegra->fpci_base + offset);
330 static inline u32 ipfs_readl(struct tegra_xusb *tegra, unsigned int offset)
332 return readl(tegra->ipfs_base + offset);
335 static inline void ipfs_writel(struct tegra_xusb *tegra, u32 value,
338 writel(value, tegra->ipfs_base + offset);
341 static inline u32 bar2_readl(struct tegra_xusb *tegra, unsigned int offset)
343 return readl(tegra->bar2_base + offset);
346 static inline void bar2_writel(struct tegra_xusb *tegra, u32 value,
349 writel(value, tegra->bar2_base + offset);
352 static u32 csb_readl(struct tegra_xusb *tegra, unsigned int offset)
354 const struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
356 return ops->csb_reg_readl(tegra, offset);
359 static void csb_writel(struct tegra_xusb *tegra, u32 value,
362 const struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
364 ops->csb_reg_writel(tegra, value, offset);
367 static u32 fpci_csb_readl(struct tegra_xusb *tegra, unsigned int offset)
372 fpci_writel(tegra, page, XUSB_CFG_ARU_C11_CSBRANGE);
374 return fpci_readl(tegra, XUSB_CFG_CSB_BASE_ADDR + ofs);
377 static void fpci_csb_writel(struct tegra_xusb *tegra, u32 value,
383 fpci_writel(tegra, page, XUSB_CFG_ARU_C11_CSBRANGE);
384 fpci_writel(tegra, value, XUSB_CFG_CSB_BASE_ADDR + ofs);
387 static u32 bar2_csb_readl(struct tegra_xusb *tegra, unsigned int offset)
392 bar2_writel(tegra, page, XUSB_BAR2_ARU_C11_CSBRANGE);
394 return bar2_readl(tegra, XUSB_BAR2_CSB_BASE_ADDR + ofs);
397 static void bar2_csb_writel(struct tegra_xusb *tegra, u32 value,
403 bar2_writel(tegra, page, XUSB_BAR2_ARU_C11_CSBRANGE);
404 bar2_writel(tegra, value, XUSB_BAR2_CSB_BASE_ADDR + ofs);
407 static int tegra_xusb_set_ss_clk(struct tegra_xusb *tegra,
411 struct clk *clk = tegra->ss_src_clk;
425 new_parent_rate = clk_get_rate(tegra->pll_u_480m);
432 err = clk_set_parent(clk, tegra->pll_u_480m);
448 err = clk_set_parent(clk, tegra->clk_m);
459 dev_err(tegra->dev, "Invalid SS rate: %lu Hz\n", rate);
464 dev_err(tegra->dev, "SS clock doesn't match requested rate\n");
535 static int tegra_xusb_mbox_send(struct tegra_xusb *tegra,
538 const struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
547 value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.owner);
549 dev_err(tegra->dev, "mailbox is busy\n");
553 ops->mbox_reg_writel(tegra, MBOX_OWNER_SW, tegra->soc->mbox.owner);
555 value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.owner);
557 dev_err(tegra->dev, "failed to acquire mailbox\n");
565 ops->mbox_reg_writel(tegra, value, tegra->soc->mbox.data_in);
567 value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.cmd);
569 ops->mbox_reg_writel(tegra, value, tegra->soc->mbox.cmd);
575 value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.owner);
583 value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.owner);
594 struct tegra_xusb *tegra = data;
595 const struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
599 value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.smi_intr);
600 ops->mbox_reg_writel(tegra, value, tegra->soc->mbox.smi_intr);
603 dev_err(tegra->dev, "controller firmware hang\n");
608 static void tegra_xusb_mbox_handle(struct tegra_xusb *tegra,
611 struct tegra_xusb_padctl *padctl = tegra->padctl;
612 const struct tegra_xusb_soc *soc = tegra->soc;
613 struct device *dev = tegra->dev;
625 rsp.data = clk_get_rate(tegra->falcon_clk) / 1000;
635 if (tegra->soc->scale_ss_clock) {
636 err = tegra_xusb_set_ss_clk(tegra, msg->data * 1000);
642 rsp.data = clk_get_rate(tegra->ss_src_clk) / 1000;
744 err = tegra_xusb_mbox_send(tegra, &rsp);
752 struct tegra_xusb *tegra = data;
753 const struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
757 mutex_lock(&tegra->lock);
759 if (pm_runtime_suspended(tegra->dev) || tegra->suspended)
762 value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.data_out);
765 value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.cmd);
767 ops->mbox_reg_writel(tegra, value, tegra->soc->mbox.cmd);
771 ops->mbox_reg_writel(tegra, MBOX_OWNER_NONE, tegra->soc->mbox.owner);
773 tegra_xusb_mbox_handle(tegra, &msg);
776 mutex_unlock(&tegra->lock);
780 static void tegra_xusb_config(struct tegra_xusb *tegra)
782 u32 regs = tegra->hcd->rsrc_start;
785 if (tegra->soc->has_ipfs) {
786 value = ipfs_readl(tegra, IPFS_XUSB_HOST_CONFIGURATION_0);
788 ipfs_writel(tegra, value, IPFS_XUSB_HOST_CONFIGURATION_0);
794 value = fpci_readl(tegra, XUSB_CFG_4);
797 fpci_writel(tegra, value, XUSB_CFG_4);
800 if (tegra->bar2) {
801 value = fpci_readl(tegra, XUSB_CFG_7);
803 value |= tegra->bar2->start &
805 fpci_writel(tegra, value, XUSB_CFG_7);
811 value = fpci_readl(tegra, XUSB_CFG_1);
813 fpci_writel(tegra, value, XUSB_CFG_1);
815 if (tegra->soc->has_ipfs) {
817 value = ipfs_readl(tegra, IPFS_XUSB_HOST_INTR_MASK_0);
819 ipfs_writel(tegra, value, IPFS_XUSB_HOST_INTR_MASK_0);
822 ipfs_writel(tegra, 0x80, IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0);
826 static int tegra_xusb_clk_enable(struct tegra_xusb *tegra)
830 err = clk_prepare_enable(tegra->pll_e);
834 err = clk_prepare_enable(tegra->host_clk);
838 err = clk_prepare_enable(tegra->ss_clk);
842 err = clk_prepare_enable(tegra->falcon_clk);
846 err = clk_prepare_enable(tegra->fs_src_clk);
850 err = clk_prepare_enable(tegra->hs_src_clk);
854 if (tegra->soc->scale_ss_clock) {
855 err = tegra_xusb_set_ss_clk(tegra, TEGRA_XHCI_SS_HIGH_SPEED);
863 clk_disable_unprepare(tegra->hs_src_clk);
865 clk_disable_unprepare(tegra->fs_src_clk);
867 clk_disable_unprepare(tegra->falcon_clk);
869 clk_disable_unprepare(tegra->ss_clk);
871 clk_disable_unprepare(tegra->host_clk);
873 clk_disable_unprepare(tegra->pll_e);
877 static void tegra_xusb_clk_disable(struct tegra_xusb *tegra)
879 clk_disable_unprepare(tegra->pll_e);
880 clk_disable_unprepare(tegra->host_clk);
881 clk_disable_unprepare(tegra->ss_clk);
882 clk_disable_unprepare(tegra->falcon_clk);
883 clk_disable_unprepare(tegra->fs_src_clk);
884 clk_disable_unprepare(tegra->hs_src_clk);
887 static int tegra_xusb_phy_enable(struct tegra_xusb *tegra)
892 for (i = 0; i < tegra->num_phys; i++) {
893 err = phy_init(tegra->phys[i]);
897 err = phy_power_on(tegra->phys[i]);
899 phy_exit(tegra->phys[i]);
908 phy_power_off(tegra->phys[i]);
909 phy_exit(tegra->phys[i]);
915 static void tegra_xusb_phy_disable(struct tegra_xusb *tegra)
919 for (i = 0; i < tegra->num_phys; i++) {
920 phy_power_off(tegra->phys[i]);
921 phy_exit(tegra->phys[i]);
926 static int tegra_xusb_init_context(struct tegra_xusb *tegra)
928 const struct tegra_xusb_context_soc *soc = tegra->soc->context;
930 tegra->context.ipfs = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets,
932 if (!tegra->context.ipfs)
935 tegra->context.fpci = devm_kcalloc(tegra->dev, soc->fpci.num_offsets,
937 if (!tegra->context.fpci)
943 static inline int tegra_xusb_init_context(struct tegra_xusb *tegra)
949 static int tegra_xusb_request_firmware(struct tegra_xusb *tegra)
955 err = request_firmware(&fw, tegra->soc->firmware, tegra->dev);
957 dev_err(tegra->dev, "failed to request firmware: %d\n", err);
963 tegra->fw.size = le32_to_cpu(header->fwimg_len);
965 tegra->fw.virt = dma_alloc_coherent(tegra->dev, tegra->fw.size,
966 &tegra->fw.phys, GFP_KERNEL);
967 if (!tegra->fw.virt) {
968 dev_err(tegra->dev, "failed to allocate memory for firmware\n");
973 header = (struct tegra_xusb_fw_header *)tegra->fw.virt;
974 memcpy(tegra->fw.virt, fw->data, tegra->fw.size);
980 static int tegra_xusb_wait_for_falcon(struct tegra_xusb *tegra)
987 cap_regs = tegra->regs;
988 op_regs = tegra->regs + HC_LENGTH(readl(&cap_regs->hc_capbase));
993 dev_err(tegra->dev, "XHCI Controller not ready. Falcon state: 0x%x\n",
994 csb_readl(tegra, XUSB_FALC_CPUCTL));
999 static int tegra_xusb_load_firmware_rom(struct tegra_xusb *tegra)
1003 struct device *dev = tegra->dev;
1009 header = (struct tegra_xusb_fw_header *)tegra->fw.virt;
1011 if (csb_readl(tegra, XUSB_CSB_MP_ILOAD_BASE_LO) != 0) {
1013 csb_readl(tegra, XUSB_FALC_CPUCTL));
1018 csb_writel(tegra, tegra->fw.size, XUSB_CSB_MP_ILOAD_ATTR);
1024 address = tegra->fw.phys + sizeof(*header);
1025 csb_writel(tegra, address >> 32, XUSB_CSB_MP_ILOAD_BASE_HI);
1026 csb_writel(tegra, address, XUSB_CSB_MP_ILOAD_BASE_LO);
1029 csb_writel(tegra, APMAP_BOOTPATH, XUSB_CSB_MP_APMAP);
1032 csb_writel(tegra, L2IMEMOP_INVALIDATE_ALL, XUSB_CSB_MP_L2IMEMOP_TRIG);
1048 csb_writel(tegra, value, XUSB_CSB_MP_L2IMEMOP_SIZE);
1051 csb_writel(tegra, L2IMEMOP_LOAD_LOCKED_RESULT,
1055 csb_writel(tegra, code_size_blocks, XUSB_FALC_IMFILLCTL);
1061 csb_writel(tegra, value, XUSB_FALC_IMFILLRNG1);
1063 csb_writel(tegra, 0, XUSB_FALC_DMACTL);
1066 #define tegra_csb_readl(offset) csb_readl(tegra, offset)
1076 csb_writel(tegra, le32_to_cpu(header->boot_codetag),
1080 csb_writel(tegra, CPUCTL_STARTCPU, XUSB_FALC_CPUCTL);
1082 if (tegra_xusb_wait_for_falcon(tegra))
1092 static u32 tegra_xusb_read_firmware_header(struct tegra_xusb *tegra, u32 offset)
1101 bar2_writel(tegra, (FW_IOCTL_CFGTBL_READ << FW_IOCTL_TYPE_SHIFT) | offset,
1103 return bar2_readl(tegra, XUSB_BAR2_ARU_SMI_ARU_FW_SCRATCH_DATA0);
1106 static int tegra_xusb_init_ifr_firmware(struct tegra_xusb *tegra)
1110 if (tegra_xusb_wait_for_falcon(tegra))
1114 timestamp = tegra_xusb_read_firmware_header(tegra, offsetof_32(struct tegra_xusb_fw_header,
1117 dev_info(tegra->dev, "Firmware timestamp: %ptTs UTC\n", ×tamp);
1122 static int tegra_xusb_load_firmware(struct tegra_xusb *tegra)
1124 if (!tegra->soc->firmware)
1125 return tegra_xusb_init_ifr_firmware(tegra);
1127 return tegra_xusb_load_firmware_rom(tegra);
1131 struct tegra_xusb *tegra)
1133 if (!tegra->use_genpd)
1136 if (!IS_ERR_OR_NULL(tegra->genpd_dev_ss))
1137 dev_pm_domain_detach(tegra->genpd_dev_ss, true);
1138 if (!IS_ERR_OR_NULL(tegra->genpd_dev_host))
1139 dev_pm_domain_detach(tegra->genpd_dev_host, true);
1143 struct tegra_xusb *tegra)
1147 tegra->genpd_dev_host = dev_pm_domain_attach_by_name(dev, "xusb_host");
1148 if (IS_ERR(tegra->genpd_dev_host)) {
1149 err = PTR_ERR(tegra->genpd_dev_host);
1154 tegra->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "xusb_ss");
1155 if (IS_ERR(tegra->genpd_dev_ss)) {
1156 err = PTR_ERR(tegra->genpd_dev_ss);
1161 tegra->use_genpd = true;
1166 static int tegra_xusb_unpowergate_partitions(struct tegra_xusb *tegra)
1168 struct device *dev = tegra->dev;
1171 if (tegra->use_genpd) {
1172 rc = pm_runtime_resume_and_get(tegra->genpd_dev_ss);
1178 rc = pm_runtime_resume_and_get(tegra->genpd_dev_host);
1181 pm_runtime_put_sync(tegra->genpd_dev_ss);
1186 tegra->ss_clk,
1187 tegra->ss_rst);
1194 tegra->host_clk,
1195 tegra->host_rst);
1206 static int tegra_xusb_powergate_partitions(struct tegra_xusb *tegra)
1208 struct device *dev = tegra->dev;
1211 if (tegra->use_genpd) {
1212 rc = pm_runtime_put_sync(tegra->genpd_dev_host);
1218 rc = pm_runtime_put_sync(tegra->genpd_dev_ss);
1221 pm_runtime_get_sync(tegra->genpd_dev_host);
1235 tegra->host_clk,
1236 tegra->host_rst);
1244 static int __tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra)
1253 err = tegra_xusb_mbox_send(tegra, &msg);
1255 dev_err(tegra->dev, "failed to enable messages: %d\n", err);
1262 struct tegra_xusb *tegra = data;
1264 mutex_lock(&tegra->lock);
1266 if (tegra->suspended) {
1267 mutex_unlock(&tegra->lock);
1271 mutex_unlock(&tegra->lock);
1273 pm_runtime_resume(tegra->dev);
1278 static int tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra)
1282 mutex_lock(&tegra->lock);
1283 err = __tegra_xusb_enable_firmware_messages(tegra);
1284 mutex_unlock(&tegra->lock);
1289 static void tegra_xhci_set_port_power(struct tegra_xusb *tegra, bool main,
1292 struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd);
1296 u16 wIndex = main ? tegra->otg_usb2_port + 1 : tegra->otg_usb3_port + 1;
1301 dev_dbg(tegra->dev, "%s():%s %s port power\n", __func__,
1320 dev_info(tegra->dev, "failed to %s %s PP %d\n",
1325 static struct phy *tegra_xusb_get_phy(struct tegra_xusb *tegra, char *name,
1330 for (i = 0; i < tegra->soc->num_types; i++) {
1331 if (!strncmp(tegra->soc->phy_types[i].name, name,
1333 return tegra->phys[phy_count+port];
1335 phy_count += tegra->soc->phy_types[i].num;
1343 struct tegra_xusb *tegra = container_of(work, struct tegra_xusb,
1345 struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd);
1347 struct phy *phy = tegra_xusb_get_phy(tegra, "usb2",
1348 tegra->otg_usb2_port);
1352 dev_dbg(tegra->dev, "host mode %s\n", tegra->host_mode ? "on" : "off");
1354 mutex_lock(&tegra->lock);
1356 if (tegra->host_mode)
1361 mutex_unlock(&tegra->lock);
1363 tegra->otg_usb3_port = tegra_xusb_padctl_get_usb3_companion(tegra->padctl,
1364 tegra->otg_usb2_port);
1366 if (tegra->host_mode) {
1368 if (tegra->otg_usb3_port >= 0) {
1369 if (tegra->soc->otg_reset_sspi) {
1373 0, tegra->otg_usb3_port+1,
1376 tegra_xhci_set_port_power(tegra, false,
1381 msg.data = tegra->otg_usb3_port+1;
1383 ret = tegra_xusb_mbox_send(tegra, &msg);
1385 dev_info(tegra->dev,
1391 tegra_xhci_set_port_power(tegra, false, true);
1394 tegra_xhci_set_port_power(tegra, true, true);
1397 if (tegra->otg_usb3_port >= 0)
1398 tegra_xhci_set_port_power(tegra, false, false);
1400 tegra_xhci_set_port_power(tegra, true, false);
1405 static bool is_usb2_otg_phy(struct tegra_xusb *tegra, unsigned int index)
1407 return (tegra->usbphy[index] != NULL);
1410 static bool is_usb3_otg_phy(struct tegra_xusb *tegra, unsigned int index)
1412 struct tegra_xusb_padctl *padctl = tegra->padctl;
1416 for (i = 0; i < tegra->num_usb_phys; i++) {
1417 if (is_usb2_otg_phy(tegra, i)) {
1427 static bool is_host_mode_phy(struct tegra_xusb *tegra, unsigned int phy_type, unsigned int index)
1429 if (strcmp(tegra->soc->phy_types[phy_type].name, "hsic") == 0)
1432 if (strcmp(tegra->soc->phy_types[phy_type].name, "usb2") == 0) {
1433 if (is_usb2_otg_phy(tegra, index))
1434 return ((index == tegra->otg_usb2_port) && tegra->host_mode);
1439 if (strcmp(tegra->soc->phy_types[phy_type].name, "usb3") == 0) {
1440 if (is_usb3_otg_phy(tegra, index))
1441 return ((index == tegra->otg_usb3_port) && tegra->host_mode);
1450 static int tegra_xusb_get_usb2_port(struct tegra_xusb *tegra,
1455 for (i = 0; i < tegra->num_usb_phys; i++) {
1456 if (tegra->usbphy[i] && usbphy == tegra->usbphy[i])
1466 struct tegra_xusb *tegra = container_of(nb, struct tegra_xusb,
1470 dev_dbg(tegra->dev, "%s(): action is %d", __func__, usbphy->last_event);
1472 if ((tegra->host_mode && usbphy->last_event == USB_EVENT_ID) ||
1473 (!tegra->host_mode && usbphy->last_event != USB_EVENT_ID)) {
1474 dev_dbg(tegra->dev, "Same role(%d) received. Ignore",
1475 tegra->host_mode);
1479 tegra->otg_usb2_port = tegra_xusb_get_usb2_port(tegra, usbphy);
1481 tegra->host_mode = (usbphy->last_event == USB_EVENT_ID) ? true : false;
1483 schedule_work(&tegra->id_work);
1488 static int tegra_xusb_init_usb_phy(struct tegra_xusb *tegra)
1492 tegra->usbphy = devm_kcalloc(tegra->dev, tegra->num_usb_phys,
1493 sizeof(*tegra->usbphy), GFP_KERNEL);
1494 if (!tegra->usbphy)
1497 INIT_WORK(&tegra->id_work, tegra_xhci_id_work);
1498 tegra->id_nb.notifier_call = tegra_xhci_id_notify;
1499 tegra->otg_usb2_port = -EINVAL;
1500 tegra->otg_usb3_port = -EINVAL;
1502 for (i = 0; i < tegra->num_usb_phys; i++) {
1503 struct phy *phy = tegra_xusb_get_phy(tegra, "usb2", i);
1508 tegra->usbphy[i] = devm_usb_get_phy_by_node(tegra->dev,
1510 &tegra->id_nb);
1511 if (!IS_ERR(tegra->usbphy[i])) {
1512 dev_dbg(tegra->dev, "usbphy-%d registered", i);
1513 otg_set_host(tegra->usbphy[i]->otg, &tegra->hcd->self);
1518 tegra->usbphy[i] = NULL;
1525 static void tegra_xusb_deinit_usb_phy(struct tegra_xusb *tegra)
1529 cancel_work_sync(&tegra->id_work);
1531 for (i = 0; i < tegra->num_usb_phys; i++)
1532 if (tegra->usbphy[i])
1533 otg_set_host(tegra->usbphy[i]->otg, NULL);
1538 struct tegra_xusb *tegra;
1548 tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL);
1549 if (!tegra)
1552 tegra->soc = of_device_get_match_data(&pdev->dev);
1553 mutex_init(&tegra->lock);
1554 tegra->dev = &pdev->dev;
1556 err = tegra_xusb_init_context(tegra);
1560 tegra->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ®s);
1561 if (IS_ERR(tegra->regs))
1562 return PTR_ERR(tegra->regs);
1564 tegra->fpci_base = devm_platform_ioremap_resource(pdev, 1);
1565 if (IS_ERR(tegra->fpci_base))
1566 return PTR_ERR(tegra->fpci_base);
1568 if (tegra->soc->has_ipfs) {
1569 tegra->ipfs_base = devm_platform_ioremap_resource(pdev, 2);
1570 if (IS_ERR(tegra->ipfs_base))
1571 return PTR_ERR(tegra->ipfs_base);
1572 } else if (tegra->soc->has_bar2) {
1573 tegra->bar2_base = devm_platform_get_and_ioremap_resource(pdev, 2, &tegra->bar2);
1574 if (IS_ERR(tegra->bar2_base))
1575 return PTR_ERR(tegra->bar2_base);
1578 tegra->xhci_irq = platform_get_irq(pdev, 0);
1579 if (tegra->xhci_irq < 0)
1580 return tegra->xhci_irq;
1582 tegra->mbox_irq = platform_get_irq(pdev, 1);
1583 if (tegra->mbox_irq < 0)
1584 return tegra->mbox_irq;
1586 tegra->padctl = tegra_xusb_padctl_get(&pdev->dev);
1587 if (IS_ERR(tegra->padctl))
1588 return PTR_ERR(tegra->padctl);
1596 tegra->padctl_irq = of_irq_get(np, 0);
1597 if (tegra->padctl_irq == -EPROBE_DEFER) {
1598 err = tegra->padctl_irq;
1600 } else if (tegra->padctl_irq <= 0) {
1602 tegra->padctl_irq = 0;
1607 tegra->host_clk = devm_clk_get(&pdev->dev, "xusb_host");
1608 if (IS_ERR(tegra->host_clk)) {
1609 err = PTR_ERR(tegra->host_clk);
1614 tegra->falcon_clk = devm_clk_get(&pdev->dev, "xusb_falcon_src");
1615 if (IS_ERR(tegra->falcon_clk)) {
1616 err = PTR_ERR(tegra->falcon_clk);
1621 tegra->ss_clk = devm_clk_get(&pdev->dev, "xusb_ss");
1622 if (IS_ERR(tegra->ss_clk)) {
1623 err = PTR_ERR(tegra->ss_clk);
1628 tegra->ss_src_clk = devm_clk_get(&pdev->dev, "xusb_ss_src");
1629 if (IS_ERR(tegra->ss_src_clk)) {
1630 err = PTR_ERR(tegra->ss_src_clk);
1635 tegra->hs_src_clk = devm_clk_get(&pdev->dev, "xusb_hs_src");
1636 if (IS_ERR(tegra->hs_src_clk)) {
1637 err = PTR_ERR(tegra->hs_src_clk);
1642 tegra->fs_src_clk = devm_clk_get(&pdev->dev, "xusb_fs_src");
1643 if (IS_ERR(tegra->fs_src_clk)) {
1644 err = PTR_ERR(tegra->fs_src_clk);
1649 tegra->pll_u_480m = devm_clk_get(&pdev->dev, "pll_u_480m");
1650 if (IS_ERR(tegra->pll_u_480m)) {
1651 err = PTR_ERR(tegra->pll_u_480m);
1656 tegra->clk_m = devm_clk_get(&pdev->dev, "clk_m");
1657 if (IS_ERR(tegra->clk_m)) {
1658 err = PTR_ERR(tegra->clk_m);
1663 tegra->pll_e = devm_clk_get(&pdev->dev, "pll_e");
1664 if (IS_ERR(tegra->pll_e)) {
1665 err = PTR_ERR(tegra->pll_e);
1671 tegra->host_rst = devm_reset_control_get(&pdev->dev,
1673 if (IS_ERR(tegra->host_rst)) {
1674 err = PTR_ERR(tegra->host_rst);
1680 tegra->ss_rst = devm_reset_control_get(&pdev->dev, "xusb_ss");
1681 if (IS_ERR(tegra->ss_rst)) {
1682 err = PTR_ERR(tegra->ss_rst);
1688 err = tegra_xusb_powerdomain_init(&pdev->dev, tegra);
1693 tegra->supplies = devm_kcalloc(&pdev->dev, tegra->soc->num_supplies,
1694 sizeof(*tegra->supplies), GFP_KERNEL);
1695 if (!tegra->supplies) {
1700 regulator_bulk_set_supply_names(tegra->supplies,
1701 tegra->soc->supply_names,
1702 tegra->soc->num_supplies);
1704 err = devm_regulator_bulk_get(&pdev->dev, tegra->soc->num_supplies,
1705 tegra->supplies);
1711 for (i = 0; i < tegra->soc->num_types; i++) {
1712 if (!strncmp(tegra->soc->phy_types[i].name, "usb2", 4))
1713 tegra->num_usb_phys = tegra->soc->phy_types[i].num;
1714 tegra->num_phys += tegra->soc->phy_types[i].num;
1717 tegra->phys = devm_kcalloc(&pdev->dev, tegra->num_phys,
1718 sizeof(*tegra->phys), GFP_KERNEL);
1719 if (!tegra->phys) {
1724 for (i = 0, k = 0; i < tegra->soc->num_types; i++) {
1727 for (j = 0; j < tegra->soc->phy_types[i].num; j++) {
1729 tegra->soc->phy_types[i].name, j);
1740 tegra->phys[k++] = phy;
1744 tegra->hcd = usb_create_hcd(&tegra_xhci_hc_driver, &pdev->dev,
1746 if (!tegra->hcd) {
1751 tegra->hcd->skip_phy_initialization = 1;
1752 tegra->hcd->regs = tegra->regs;
1753 tegra->hcd->rsrc_start = regs->start;
1754 tegra->hcd->rsrc_len = resource_size(regs);
1760 platform_set_drvdata(pdev, tegra);
1762 err = tegra_xusb_clk_enable(tegra);
1764 dev_err(tegra->dev, "failed to enable clocks: %d\n", err);
1768 err = regulator_bulk_enable(tegra->soc->num_supplies, tegra->supplies);
1770 dev_err(tegra->dev, "failed to enable regulators: %d\n", err);
1774 err = tegra_xusb_phy_enable(tegra);
1784 err = dma_set_mask_and_coherent(tegra->dev, DMA_BIT_MASK(40));
1790 if (tegra->soc->firmware) {
1791 err = tegra_xusb_request_firmware(tegra);
1799 err = tegra_xusb_unpowergate_partitions(tegra);
1803 tegra_xusb_config(tegra);
1805 err = tegra_xusb_load_firmware(tegra);
1811 err = usb_add_hcd(tegra->hcd, tegra->xhci_irq, IRQF_SHARED);
1817 device_wakeup_enable(tegra->hcd->self.controller);
1819 xhci = hcd_to_xhci(tegra->hcd);
1824 tegra->hcd);
1834 err = usb_add_hcd(xhci->shared_hcd, tegra->xhci_irq, IRQF_SHARED);
1840 err = devm_request_threaded_irq(&pdev->dev, tegra->mbox_irq,
1843 dev_name(&pdev->dev), tegra);
1849 if (tegra->padctl_irq) {
1850 err = devm_request_threaded_irq(&pdev->dev, tegra->padctl_irq,
1853 tegra);
1860 err = tegra_xusb_enable_firmware_messages(tegra);
1866 err = tegra_xusb_init_usb_phy(tegra);
1873 device_init_wakeup(&tegra->hcd->self.root_hub->dev, true);
1876 pm_runtime_use_autosuspend(tegra->dev);
1877 pm_runtime_set_autosuspend_delay(tegra->dev, 2000);
1878 pm_runtime_mark_last_busy(tegra->dev);
1879 pm_runtime_set_active(tegra->dev);
1881 if (tegra->padctl_irq) {
1882 device_init_wakeup(tegra->dev, true);
1883 pm_runtime_enable(tegra->dev);
1893 usb_remove_hcd(tegra->hcd);
1895 tegra_xusb_powergate_partitions(tegra);
1897 dma_free_coherent(&pdev->dev, tegra->fw.size, tegra->fw.virt,
1898 tegra->fw.phys);
1900 tegra_xusb_phy_disable(tegra);
1902 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies);
1904 tegra_xusb_clk_disable(tegra);
1906 usb_put_hcd(tegra->hcd);
1908 tegra_xusb_powerdomain_remove(&pdev->dev, tegra);
1911 tegra_xusb_padctl_put(tegra->padctl);
1915 static void tegra_xusb_disable(struct tegra_xusb *tegra)
1917 tegra_xusb_powergate_partitions(tegra);
1918 tegra_xusb_powerdomain_remove(tegra->dev, tegra);
1919 tegra_xusb_phy_disable(tegra);
1920 tegra_xusb_clk_disable(tegra);
1921 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies);
1926 struct tegra_xusb *tegra = platform_get_drvdata(pdev);
1927 struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd);
1929 tegra_xusb_deinit_usb_phy(tegra);
1935 usb_remove_hcd(tegra->hcd);
1936 usb_put_hcd(tegra->hcd);
1938 dma_free_coherent(&pdev->dev, tegra->fw.size, tegra->fw.virt,
1939 tegra->fw.phys);
1941 if (tegra->padctl_irq)
1946 tegra_xusb_disable(tegra);
1947 tegra_xusb_padctl_put(tegra->padctl);
1952 struct tegra_xusb *tegra = platform_get_drvdata(pdev);
1955 disable_irq(tegra->xhci_irq);
1956 xhci_shutdown(tegra->hcd);
1957 tegra_xusb_disable(tegra);
1982 static int tegra_xusb_check_ports(struct tegra_xusb *tegra)
1984 struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd);
2007 static void tegra_xusb_save_context(struct tegra_xusb *tegra)
2009 const struct tegra_xusb_context_soc *soc = tegra->soc->context;
2010 struct tegra_xusb_context *ctx = &tegra->context;
2015 ctx->ipfs[i] = ipfs_readl(tegra, soc->ipfs.offsets[i]);
2020 ctx->fpci[i] = fpci_readl(tegra, soc->fpci.offsets[i]);
2024 static void tegra_xusb_restore_context(struct tegra_xusb *tegra)
2026 const struct tegra_xusb_context_soc *soc = tegra->soc->context;
2027 struct tegra_xusb_context *ctx = &tegra->context;
2032 fpci_writel(tegra, ctx->fpci[i], soc->fpci.offsets[i]);
2037 ipfs_writel(tegra, ctx->ipfs[i], soc->ipfs.offsets[i]);
2041 static enum usb_device_speed tegra_xhci_portsc_to_speed(struct tegra_xusb *tegra, u32 portsc)
2058 static void tegra_xhci_enable_phy_sleepwalk_wake(struct tegra_xusb *tegra)
2060 struct tegra_xusb_padctl *padctl = tegra->padctl;
2061 struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd);
2069 for (i = 0, k = 0; i < tegra->soc->num_types; i++) {
2070 if (strcmp(tegra->soc->phy_types[i].name, "usb3") == 0)
2075 if (strcmp(tegra->soc->phy_types[i].name, "hsic") == 0)
2076 offset = tegra->soc->ports.usb2.count;
2080 for (j = 0; j < tegra->soc->phy_types[i].num; j++) {
2081 phy = tegra->phys[k++];
2091 if (!is_host_mode_phy(tegra, i, j))
2095 speed = tegra_xhci_portsc_to_speed(tegra, portsc);
2102 static void tegra_xhci_disable_phy_wake(struct tegra_xusb *tegra)
2104 struct tegra_xusb_padctl *padctl = tegra->padctl;
2107 for (i = 0; i < tegra->num_usb_phys; i++) {
2108 struct phy *phy = tegra_xusb_get_phy(tegra, "usb2", i);
2117 for (i = 0; i < tegra->num_phys; i++) {
2118 if (!tegra->phys[i])
2121 if (tegra_xusb_padctl_remote_wake_detected(padctl, tegra->phys[i]))
2122 dev_dbg(tegra->dev, "%pOF remote wake detected\n",
2123 tegra->phys[i]->dev.of_node);
2125 tegra_xusb_padctl_disable_phy_wake(padctl, tegra->phys[i]);
2129 static void tegra_xhci_disable_phy_sleepwalk(struct tegra_xusb *tegra)
2131 struct tegra_xusb_padctl *padctl = tegra->padctl;
2134 for (i = 0; i < tegra->num_phys; i++) {
2135 if (!tegra->phys[i])
2138 tegra_xusb_padctl_disable_phy_sleepwalk(padctl, tegra->phys[i]);
2142 static void tegra_xhci_program_utmi_power_lp0_exit(struct tegra_xusb *tegra)
2147 for (i = 0; i < tegra->soc->num_types; i++) {
2148 if (strcmp(tegra->soc->phy_types[i].name, "usb2") == 0)
2152 for (i = 0; i < tegra->num_usb_phys; i++) {
2153 if (!is_host_mode_phy(tegra, index_to_usb2, i))
2156 phy = tegra_xusb_get_phy(tegra, "usb2", i);
2157 if (tegra->lp0_utmi_pad_mask & BIT(i))
2164 static int tegra_xusb_enter_elpg(struct tegra_xusb *tegra, bool runtime)
2166 struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd);
2167 struct device *dev = tegra->dev;
2180 err = tegra_xusb_check_ports(tegra);
2182 dev_err(tegra->dev, "not all ports suspended: %d\n", err);
2186 for (i = 0; i < tegra->num_usb_phys; i++) {
2190 tegra->lp0_utmi_pad_mask &= ~BIT(i);
2192 tegra->lp0_utmi_pad_mask |= BIT(i);
2197 dev_err(tegra->dev, "failed to suspend XHCI: %d\n", err);
2201 tegra_xusb_save_context(tegra);
2204 tegra_xhci_enable_phy_sleepwalk_wake(tegra);
2206 tegra_xusb_powergate_partitions(tegra);
2208 for (i = 0; i < tegra->num_phys; i++) {
2209 if (!tegra->phys[i])
2212 phy_power_off(tegra->phys[i]);
2214 phy_exit(tegra->phys[i]);
2217 tegra_xusb_clk_disable(tegra);
2221 dev_dbg(tegra->dev, "entering ELPG done\n");
2227 dev_dbg(tegra->dev, "entering ELPG failed\n");
2228 pm_runtime_mark_last_busy(tegra->dev);
2234 static int tegra_xusb_exit_elpg(struct tegra_xusb *tegra, bool runtime)
2236 struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd);
2237 struct device *dev = tegra->dev;
2244 pm_runtime_mark_last_busy(tegra->dev);
2246 err = tegra_xusb_clk_enable(tegra);
2248 dev_err(tegra->dev, "failed to enable clocks: %d\n", err);
2252 err = tegra_xusb_unpowergate_partitions(tegra);
2257 tegra_xhci_disable_phy_wake(tegra);
2259 for (i = 0; i < tegra->num_phys; i++) {
2260 if (!tegra->phys[i])
2264 phy_init(tegra->phys[i]);
2266 phy_power_on(tegra->phys[i]);
2268 if (tegra->suspended)
2269 tegra_xhci_program_utmi_power_lp0_exit(tegra);
2271 tegra_xusb_config(tegra);
2272 tegra_xusb_restore_context(tegra);
2274 err = tegra_xusb_load_firmware(tegra);
2276 dev_err(tegra->dev, "failed to load firmware: %d\n", err);
2280 err = __tegra_xusb_enable_firmware_messages(tegra);
2282 dev_err(tegra->dev, "failed to enable messages: %d\n", err);
2287 tegra_xhci_disable_phy_sleepwalk(tegra);
2291 dev_err(tegra->dev, "failed to resume XHCI: %d\n", err);
2302 for (i = 0; i < tegra->num_phys; i++) {
2303 if (!tegra->phys[i])
2306 phy_power_off(tegra->phys[i]);
2308 phy_exit(tegra->phys[i]);
2310 tegra_xusb_powergate_partitions(tegra);
2312 tegra_xusb_clk_disable(tegra);
2324 struct tegra_xusb *tegra = dev_get_drvdata(dev);
2327 synchronize_irq(tegra->mbox_irq);
2329 mutex_lock(&tegra->lock);
2332 err = tegra_xusb_exit_elpg(tegra, true);
2337 err = tegra_xusb_enter_elpg(tegra, false);
2350 tegra->suspended = true;
2354 if (enable_irq_wake(tegra->padctl_irq))
2359 mutex_unlock(&tegra->lock);
2366 struct tegra_xusb *tegra = dev_get_drvdata(dev);
2369 mutex_lock(&tegra->lock);
2371 if (!tegra->suspended) {
2372 mutex_unlock(&tegra->lock);
2376 err = tegra_xusb_exit_elpg(tegra, false);
2378 mutex_unlock(&tegra->lock);
2383 if (disable_irq_wake(tegra->padctl_irq))
2386 tegra->suspended = false;
2387 mutex_unlock(&tegra->lock);
2397 struct tegra_xusb *tegra = dev_get_drvdata(dev);
2400 synchronize_irq(tegra->mbox_irq);
2401 mutex_lock(&tegra->lock);
2402 ret = tegra_xusb_enter_elpg(tegra, true);
2403 mutex_unlock(&tegra->lock);
2410 struct tegra_xusb *tegra = dev_get_drvdata(dev);
2413 mutex_lock(&tegra->lock);
2414 err = tegra_xusb_exit_elpg(tegra, true);
2415 mutex_unlock(&tegra->lock);
2670 .name = "tegra-xusb",
2678 struct tegra_xusb *tegra = dev_get_drvdata(dev);
2680 if (tegra && tegra->soc->lpm_support)
2692 struct tegra_xusb *tegra = dev_get_drvdata(hcd->self.controller);
2714 tegra_xusb_get_phy(tegra, "usb2", (int) i));
2719 phy = tegra_xusb_get_phy(tegra, "usb2", port);