Lines Matching defs:r8a66597
30 #include "r8a66597.h"
41 static void packet_write(struct r8a66597 *r8a66597, u16 pipenum);
45 static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
50 tmp = r8a66597_read(r8a66597, INTENB0);
51 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, INTENB0);
52 r8a66597_bset(r8a66597, 1 << pipenum, reg);
53 r8a66597_write(r8a66597, tmp, INTENB0);
57 static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
62 tmp = r8a66597_read(r8a66597, INTENB0);
63 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, INTENB0);
64 r8a66597_bclr(r8a66597, 1 << pipenum, reg);
65 r8a66597_write(r8a66597, tmp, INTENB0);
68 static void set_devadd_reg(struct r8a66597 *r8a66597, u8 r8a66597_address,
75 r8a66597_write(r8a66597, val, devadd_reg);
78 static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
83 if (r8a66597->pdata->on_chip) {
84 clk_prepare_enable(r8a66597->clk);
86 r8a66597_write(r8a66597, SCKE, SYSCFG0);
87 tmp = r8a66597_read(r8a66597, SYSCFG0);
89 printk(KERN_ERR "r8a66597: reg access fail.\n");
93 r8a66597_write(r8a66597, 0x04, 0x02);
96 r8a66597_write(r8a66597, USBE, SYSCFG0);
97 tmp = r8a66597_read(r8a66597, SYSCFG0);
99 printk(KERN_ERR "r8a66597: reg access fail.\n");
103 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
104 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
108 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
111 tmp = r8a66597_read(r8a66597, SYSCFG0);
113 printk(KERN_ERR "r8a66597: reg access fail.\n");
122 static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
124 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
127 if (r8a66597->pdata->on_chip) {
128 clk_disable_unprepare(r8a66597->clk);
130 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
131 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
132 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
136 static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
141 r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
142 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
144 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
145 r8a66597_bclr(r8a66597, DTCHE, get_intenb_reg(port));
146 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
149 static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
153 r8a66597_write(r8a66597, 0, get_intenb_reg(port));
154 r8a66597_write(r8a66597, 0, get_intsts_reg(port));
156 r8a66597_port_power(r8a66597, port, 0);
159 tmp = r8a66597_read(r8a66597, SOFCFG) & EDGESTS;
164 r8a66597_bclr(r8a66597, val, get_syscfg_reg(port));
165 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
168 static int enable_controller(struct r8a66597 *r8a66597)
171 u16 vif = r8a66597->pdata->vif ? LDRV : 0;
172 u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0;
173 u16 endian = r8a66597->pdata->endian ? BIGEND : 0;
175 ret = r8a66597_clock_enable(r8a66597);
179 r8a66597_bset(r8a66597, vif & LDRV, PINCFG);
180 r8a66597_bset(r8a66597, USBE, SYSCFG0);
182 r8a66597_bset(r8a66597, BEMPE | NRDYE | BRDYE, INTENB0);
183 r8a66597_bset(r8a66597, irq_sense & INTL, SOFCFG);
184 r8a66597_bset(r8a66597, BRDY0, BRDYENB);
185 r8a66597_bset(r8a66597, BEMP0, BEMPENB);
187 r8a66597_bset(r8a66597, endian & BIGEND, CFIFOSEL);
188 r8a66597_bset(r8a66597, endian & BIGEND, D0FIFOSEL);
189 r8a66597_bset(r8a66597, endian & BIGEND, D1FIFOSEL);
190 r8a66597_bset(r8a66597, TRNENSEL, SOFCFG);
192 r8a66597_bset(r8a66597, SIGNE | SACKE, INTENB1);
194 for (port = 0; port < r8a66597->max_root_hub; port++)
195 r8a66597_enable_port(r8a66597, port);
200 static void disable_controller(struct r8a66597 *r8a66597)
205 r8a66597_write(r8a66597, 0, INTENB0);
206 r8a66597_write(r8a66597, 0, INTENB1);
207 r8a66597_write(r8a66597, 0, BRDYENB);
208 r8a66597_write(r8a66597, 0, BEMPENB);
209 r8a66597_write(r8a66597, 0, NRDYENB);
212 r8a66597_write(r8a66597, 0, BRDYSTS);
213 r8a66597_write(r8a66597, 0, NRDYSTS);
214 r8a66597_write(r8a66597, 0, BEMPSTS);
216 for (port = 0; port < r8a66597->max_root_hub; port++)
217 r8a66597_disable_port(r8a66597, port);
219 r8a66597_clock_disable(r8a66597);
222 static int get_parent_r8a66597_address(struct r8a66597 *r8a66597,
247 static void get_port_number(struct r8a66597 *r8a66597,
252 if (*root_port >= r8a66597->max_root_hub)
253 printk(KERN_ERR "r8a66597: Illegal root port number.\n");
274 printk(KERN_ERR "r8a66597: unknown speed\n");
281 static void set_child_connect_map(struct r8a66597 *r8a66597, int address)
286 r8a66597->child_connect_map[idx] |= 1 << (address % 32);
289 static void put_child_connect_map(struct r8a66597 *r8a66597, int address)
294 r8a66597->child_connect_map[idx] &= ~(1 << (address % 32));
326 get_urb_to_r8a66597_dev(struct r8a66597 *r8a66597, struct urb *urb)
329 return &r8a66597->device0;
334 static int make_r8a66597_device(struct r8a66597 *r8a66597,
352 list_add_tail(&dev->device_list, &r8a66597->child_device);
354 get_port_number(r8a66597, urb->dev->devpath,
357 r8a66597->root_hub[dev->root_port].dev = dev;
359 set_devadd_reg(r8a66597, dev->address,
361 get_parent_r8a66597_address(r8a66597, urb->dev),
368 static u8 alloc_usb_address(struct r8a66597 *r8a66597, struct urb *urb)
378 dev = get_urb_to_r8a66597_dev(r8a66597, urb);
383 if (r8a66597->address_map & (1 << addr))
387 r8a66597->address_map |= 1 << addr;
389 if (make_r8a66597_device(r8a66597, urb, addr) < 0)
397 r8a66597->address_map);
403 static void free_usb_address(struct r8a66597 *r8a66597,
414 r8a66597->address_map &= ~(1 << dev->address);
426 for (port = 0; port < r8a66597->max_root_hub; port++) {
427 if (r8a66597->root_hub[port].dev == dev) {
428 r8a66597->root_hub[port].dev = NULL;
434 static void r8a66597_reg_wait(struct r8a66597 *r8a66597, unsigned long reg,
441 tmp = r8a66597_read(r8a66597, reg);
443 printk(KERN_ERR "r8a66597: register%lx, loop %x "
452 static void pipe_start(struct r8a66597 *r8a66597, struct r8a66597_pipe *pipe)
456 tmp = r8a66597_read(r8a66597, pipe->pipectr) & PID;
458 r8a66597_mdfy(r8a66597, PID_NAK, PID, pipe->pipectr);
459 r8a66597_mdfy(r8a66597, PID_BUF, PID, pipe->pipectr);
463 static void pipe_stop(struct r8a66597 *r8a66597, struct r8a66597_pipe *pipe)
467 tmp = r8a66597_read(r8a66597, pipe->pipectr) & PID;
469 r8a66597_mdfy(r8a66597, PID_STALL, PID, pipe->pipectr);
470 r8a66597_mdfy(r8a66597, PID_NAK, PID, pipe->pipectr);
471 r8a66597_reg_wait(r8a66597, pipe->pipectr, PBUSY, 0);
475 static void clear_all_buffer(struct r8a66597 *r8a66597,
481 pipe_stop(r8a66597, pipe);
482 r8a66597_bset(r8a66597, ACLRM, pipe->pipectr);
483 r8a66597_read(r8a66597, pipe->pipectr);
484 r8a66597_read(r8a66597, pipe->pipectr);
485 r8a66597_read(r8a66597, pipe->pipectr);
486 r8a66597_bclr(r8a66597, ACLRM, pipe->pipectr);
490 static void r8a66597_pipe_toggle(struct r8a66597 *r8a66597,
494 r8a66597_bset(r8a66597, SQSET, pipe->pipectr);
496 r8a66597_bset(r8a66597, SQCLR, pipe->pipectr);
499 static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
501 if (r8a66597->pdata->on_chip)
508 static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum)
510 unsigned short mbw = mbw_value(r8a66597);
512 r8a66597_mdfy(r8a66597, mbw | pipenum, mbw | CURPIPE, CFIFOSEL);
513 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum);
517 static inline void fifo_change_from_pipe(struct r8a66597 *r8a66597,
520 unsigned short mbw = mbw_value(r8a66597);
522 cfifo_change(r8a66597, 0);
523 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D0FIFOSEL);
524 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D1FIFOSEL);
526 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum, mbw | CURPIPE,
528 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum);
541 static u16 get_urb_to_r8a66597_addr(struct r8a66597 *r8a66597, struct urb *urb)
543 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
558 static void pipe_toggle_set(struct r8a66597 *r8a66597,
562 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
576 static void pipe_toggle_save(struct r8a66597 *r8a66597,
580 if (r8a66597_read(r8a66597, pipe->pipectr) & SQMON)
581 pipe_toggle_set(r8a66597, pipe, urb, 1);
583 pipe_toggle_set(r8a66597, pipe, urb, 0);
587 static void pipe_toggle_restore(struct r8a66597 *r8a66597,
591 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
598 r8a66597_pipe_toggle(r8a66597, pipe, *toggle & (1 << endpoint));
602 static void pipe_buffer_setting(struct r8a66597 *r8a66597,
610 r8a66597_bset(r8a66597, ACLRM, get_pipectr_addr(info->pipenum));
611 r8a66597_bclr(r8a66597, ACLRM, get_pipectr_addr(info->pipenum));
612 r8a66597_write(r8a66597, info->pipenum, PIPESEL);
618 r8a66597_write(r8a66597, val, PIPECFG);
620 r8a66597_write(r8a66597, (info->buf_bsize << 10) | (info->bufnum),
622 r8a66597_write(r8a66597, make_devsel(info->address) | info->maxpacket,
624 r8a66597_write(r8a66597, info->interval, PIPEPERI);
628 static void pipe_setting(struct r8a66597 *r8a66597, struct r8a66597_td *td)
635 cfifo_change(r8a66597, 0);
636 pipe_buffer_setting(r8a66597, info);
641 r8a66597_pipe_toggle(r8a66597, td->pipe, 0);
642 pipe_toggle_set(r8a66597, td->pipe, urb, 0);
643 clear_all_buffer(r8a66597, td->pipe);
647 pipe_toggle_restore(r8a66597, td->pipe, urb);
652 static u16 get_empty_pipenum(struct r8a66597 *r8a66597,
682 printk(KERN_ERR "r8a66597: Illegal type\n");
689 if (r8a66597->pipe_cnt[min] > r8a66597->pipe_cnt[array[i]])
712 printk(KERN_ERR "r8a66597: Illegal type\n");
731 printk(KERN_ERR "r8a66597: Illegal pipenum (%d)\n", pipenum);
747 printk(KERN_ERR "r8a66597: Illegal pipenum (%d)\n", pipenum);
753 static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597,
760 unsigned short mbw = mbw_value(r8a66597);
763 if (r8a66597->pdata->on_chip)
768 if ((r8a66597->dma_map & (1 << i)) != 0)
778 r8a66597->dma_map |= 1 << i;
782 cfifo_change(r8a66597, 0);
783 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum,
786 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE,
788 r8a66597_bset(r8a66597, BCLR, pipe->fifoctr);
795 static void enable_r8a66597_pipe(struct r8a66597 *r8a66597, struct urb *urb,
799 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
806 r8a66597->pipe_cnt[pipe->info.pipenum]++;
809 enable_r8a66597_pipe_dma(r8a66597, dev, pipe, urb);
812 static void r8a66597_urb_done(struct r8a66597 *r8a66597, struct urb *urb,
814 __releases(r8a66597->lock)
815 __acquires(r8a66597->lock)
826 usb_hcd_unlink_urb_from_ep(r8a66597_to_hcd(r8a66597), urb);
827 spin_unlock(&r8a66597->lock);
828 usb_hcd_giveback_urb(r8a66597_to_hcd(r8a66597), urb, status);
829 spin_lock(&r8a66597->lock);
833 static void force_dequeue(struct r8a66597 *r8a66597, u16 pipenum, u16 address)
837 struct list_head *list = &r8a66597->pipe_queue[pipenum];
851 r8a66597_urb_done(r8a66597, urb, -ENODEV);
858 static void disable_r8a66597_pipe_all(struct r8a66597 *r8a66597,
873 force_dequeue(r8a66597, 0, dev->address);
876 r8a66597->pipe_cnt[pipenum] -= dev->pipe_cnt[pipenum];
878 force_dequeue(r8a66597, pipenum, dev->address);
883 r8a66597->dma_map &= ~(dev->dma_map);
933 static void init_pipe_info(struct r8a66597 *r8a66597, struct urb *urb,
939 info.pipenum = get_empty_pipenum(r8a66597, ep);
940 info.address = get_urb_to_r8a66597_addr(r8a66597, urb);
958 enable_r8a66597_pipe(r8a66597, urb, hep, &info);
961 static void init_pipe_config(struct r8a66597 *r8a66597, struct urb *urb)
965 dev = get_urb_to_r8a66597_dev(r8a66597, urb);
969 static void pipe_irq_enable(struct r8a66597 *r8a66597, struct urb *urb,
973 enable_irq_empty(r8a66597, pipenum);
975 enable_irq_ready(r8a66597, pipenum);
978 enable_irq_nrdy(r8a66597, pipenum);
981 static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
983 disable_irq_ready(r8a66597, pipenum);
984 disable_irq_nrdy(r8a66597, pipenum);
987 static void r8a66597_root_hub_start_polling(struct r8a66597 *r8a66597)
989 mod_timer(&r8a66597->rh_timer,
993 static void start_root_hub_sampling(struct r8a66597 *r8a66597, int port,
996 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
998 rh->old_syssts = r8a66597_read(r8a66597, get_syssts_reg(port)) & LNST;
1006 r8a66597_root_hub_start_polling(r8a66597);
1010 static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port,
1012 __releases(r8a66597->lock)
1013 __acquires(r8a66597->lock)
1016 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port));
1017 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
1020 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
1022 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
1024 r8a66597_write(r8a66597, ~DTCH, get_intsts_reg(port));
1025 r8a66597_bset(r8a66597, DTCHE, get_intenb_reg(port));
1027 if (r8a66597->bus_suspended)
1028 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1031 spin_unlock(&r8a66597->lock);
1032 usb_hcd_poll_rh_status(r8a66597_to_hcd(r8a66597));
1033 spin_lock(&r8a66597->lock);
1037 static void r8a66597_usb_connect(struct r8a66597 *r8a66597, int port)
1039 u16 speed = get_rh_usb_speed(r8a66597, port);
1040 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
1053 static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597, int port)
1055 struct r8a66597_device *dev = r8a66597->root_hub[port].dev;
1057 disable_r8a66597_pipe_all(r8a66597, dev);
1058 free_usb_address(r8a66597, dev, 0);
1060 start_root_hub_sampling(r8a66597, port, 0);
1064 static void prepare_setup_packet(struct r8a66597 *r8a66597,
1071 r8a66597_write(r8a66597, make_devsel(td->address) | td->maxpacket,
1073 r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
1076 r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
1079 r8a66597_write(r8a66597, SUREQ, DCPCTR);
1083 static void prepare_packet_read(struct r8a66597 *r8a66597,
1089 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
1090 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
1091 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1093 r8a66597_pipe_toggle(r8a66597, td->pipe, 1);
1094 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
1096 pipe_irq_disable(r8a66597, td->pipenum);
1097 pipe_start(r8a66597, td->pipe);
1098 pipe_irq_enable(r8a66597, urb, td->pipenum);
1101 pipe_irq_disable(r8a66597, td->pipenum);
1102 pipe_setting(r8a66597, td);
1103 pipe_stop(r8a66597, td->pipe);
1104 r8a66597_write(r8a66597, ~(1 << td->pipenum), BRDYSTS);
1107 r8a66597_write(r8a66597, TRCLR,
1109 r8a66597_write(r8a66597,
1114 r8a66597_bset(r8a66597, TRENB,
1118 pipe_start(r8a66597, td->pipe);
1119 pipe_irq_enable(r8a66597, urb, td->pipenum);
1125 static void prepare_packet_write(struct r8a66597 *r8a66597,
1132 pipe_stop(r8a66597, td->pipe);
1133 r8a66597_bset(r8a66597, R8A66597_DIR, DCPCFG);
1134 r8a66597_mdfy(r8a66597, ISEL, ISEL | CURPIPE, CFIFOSEL);
1135 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1137 r8a66597_pipe_toggle(r8a66597, td->pipe, 1);
1138 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
1142 pipe_setting(r8a66597, td);
1144 r8a66597_bclr(r8a66597, TRENB, td->pipe->pipetre);
1146 r8a66597_write(r8a66597, ~(1 << td->pipenum), BRDYSTS);
1148 fifo_change_from_pipe(r8a66597, td->pipe);
1149 tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);
1151 pipe_irq_enable(r8a66597, urb, td->pipenum);
1153 packet_write(r8a66597, td->pipenum);
1154 pipe_start(r8a66597, td->pipe);
1158 static void prepare_status_packet(struct r8a66597 *r8a66597,
1163 r8a66597_pipe_toggle(r8a66597, td->pipe, 1);
1164 pipe_stop(r8a66597, td->pipe);
1167 r8a66597_bset(r8a66597, R8A66597_DIR, DCPCFG);
1168 r8a66597_mdfy(r8a66597, ISEL, ISEL | CURPIPE, CFIFOSEL);
1169 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1170 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
1171 r8a66597_write(r8a66597, BCLR | BVAL, CFIFOCTR);
1172 enable_irq_empty(r8a66597, 0);
1174 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
1175 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
1176 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1177 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
1178 enable_irq_ready(r8a66597, 0);
1180 enable_irq_nrdy(r8a66597, 0);
1181 pipe_start(r8a66597, td->pipe);
1194 static int start_transfer(struct r8a66597 *r8a66597, struct r8a66597_td *td)
1202 td->urb->setup_packet[2] = alloc_usb_address(r8a66597,
1207 prepare_setup_packet(r8a66597, td);
1210 prepare_packet_read(r8a66597, td);
1213 prepare_packet_write(r8a66597, td);
1216 prepare_status_packet(r8a66597, td);
1219 printk(KERN_ERR "r8a66597: invalid type.\n");
1242 static void set_td_timer(struct r8a66597 *r8a66597, struct r8a66597_td *td)
1248 if (!list_empty(&r8a66597->pipe_queue[td->pipenum]) &&
1250 r8a66597->timeout_map |= 1 << td->pipenum;
1261 mod_timer(&r8a66597->timers[td->pipenum].td,
1267 static void finish_request(struct r8a66597 *r8a66597, struct r8a66597_td *td,
1269 __releases(r8a66597->lock) __acquires(r8a66597->lock)
1272 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
1274 r8a66597->timeout_map &= ~(1 << pipenum);
1278 r8a66597->address_map &= ~(1 << urb->setup_packet[2]);
1280 pipe_toggle_save(r8a66597, td->pipe, urb);
1285 if (!list_empty(&r8a66597->pipe_queue[pipenum]))
1292 r8a66597_urb_done(r8a66597, urb, status);
1296 td = r8a66597_get_td(r8a66597, pipenum);
1300 start_transfer(r8a66597, td);
1301 set_td_timer(r8a66597, td);
1305 static void packet_read(struct r8a66597 *r8a66597, u16 pipenum)
1310 struct r8a66597_td *td = r8a66597_get_td(r8a66597, pipenum);
1319 fifo_change_from_pipe(r8a66597, td->pipe);
1320 tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);
1322 pipe_stop(r8a66597, td->pipe);
1323 pipe_irq_disable(r8a66597, pipenum);
1324 printk(KERN_ERR "r8a66597: in fifo not ready (%d)\n", pipenum);
1325 finish_request(r8a66597, td, pipenum, td->urb, -EPIPE);
1364 pipe_stop(r8a66597, td->pipe);
1365 pipe_irq_disable(r8a66597, pipenum);
1372 r8a66597_write(r8a66597, BCLR, td->pipe->fifoctr);
1374 r8a66597_read_fifo(r8a66597, td->pipe->fifoaddr,
1379 finish_request(r8a66597, td, pipenum, urb, status);
1382 static void packet_write(struct r8a66597 *r8a66597, u16 pipenum)
1387 struct r8a66597_td *td = r8a66597_get_td(r8a66597, pipenum);
1394 fifo_change_from_pipe(r8a66597, td->pipe);
1395 tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);
1397 pipe_stop(r8a66597, td->pipe);
1398 pipe_irq_disable(r8a66597, pipenum);
1399 printk(KERN_ERR "r8a66597: out fifo not ready (%d)\n", pipenum);
1400 finish_request(r8a66597, td, pipenum, urb, -EPIPE);
1419 r8a66597_write(r8a66597, ~(1 << pipenum), BEMPSTS);
1421 r8a66597_write_fifo(r8a66597, td->pipe, buf, size);
1423 r8a66597_write(r8a66597, BVAL, td->pipe->fifoctr);
1436 disable_irq_ready(r8a66597, pipenum);
1437 enable_irq_empty(r8a66597, pipenum);
1439 enable_irq_nrdy(r8a66597, pipenum);
1441 pipe_irq_enable(r8a66597, urb, pipenum);
1445 static void check_next_phase(struct r8a66597 *r8a66597, int status)
1447 struct r8a66597_td *td = r8a66597_get_td(r8a66597, 0);
1475 finish_request(r8a66597, td, 0, urb, status);
1477 start_transfer(r8a66597, td);
1480 static int get_urb_error(struct r8a66597 *r8a66597, u16 pipenum)
1482 struct r8a66597_td *td = r8a66597_get_td(r8a66597, pipenum);
1485 u16 pid = r8a66597_read(r8a66597, td->pipe->pipectr) & PID;
1495 static void irq_pipe_ready(struct r8a66597 *r8a66597)
1502 mask = r8a66597_read(r8a66597, BRDYSTS)
1503 & r8a66597_read(r8a66597, BRDYENB);
1504 r8a66597_write(r8a66597, ~mask, BRDYSTS);
1506 td = r8a66597_get_td(r8a66597, 0);
1508 packet_read(r8a66597, 0);
1510 pipe_irq_disable(r8a66597, 0);
1511 check_next_phase(r8a66597, 0);
1517 td = r8a66597_get_td(r8a66597, pipenum);
1522 packet_read(r8a66597, pipenum);
1524 packet_write(r8a66597, pipenum);
1529 static void irq_pipe_empty(struct r8a66597 *r8a66597)
1537 mask = r8a66597_read(r8a66597, BEMPSTS)
1538 & r8a66597_read(r8a66597, BEMPENB);
1539 r8a66597_write(r8a66597, ~mask, BEMPSTS);
1541 cfifo_change(r8a66597, 0);
1542 td = r8a66597_get_td(r8a66597, 0);
1544 disable_irq_empty(r8a66597, 0);
1545 check_next_phase(r8a66597, 0);
1552 td = r8a66597_get_td(r8a66597, pipenum);
1556 tmp = r8a66597_read(r8a66597, td->pipe->pipectr);
1558 disable_irq_empty(r8a66597, pipenum);
1559 pipe_irq_disable(r8a66597, pipenum);
1560 finish_request(r8a66597, td, pipenum, td->urb,
1567 static void irq_pipe_nrdy(struct r8a66597 *r8a66597)
1574 mask = r8a66597_read(r8a66597, NRDYSTS)
1575 & r8a66597_read(r8a66597, NRDYENB);
1576 r8a66597_write(r8a66597, ~mask, NRDYSTS);
1578 cfifo_change(r8a66597, 0);
1579 status = get_urb_error(r8a66597, 0);
1580 pipe_irq_disable(r8a66597, 0);
1581 check_next_phase(r8a66597, status);
1588 td = r8a66597_get_td(r8a66597, pipenum);
1592 status = get_urb_error(r8a66597, pipenum);
1593 pipe_irq_disable(r8a66597, pipenum);
1594 pipe_stop(r8a66597, td->pipe);
1595 finish_request(r8a66597, td, pipenum, td->urb, status);
1602 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1608 spin_lock(&r8a66597->lock);
1610 intsts0 = r8a66597_read(r8a66597, INTSTS0);
1611 intsts1 = r8a66597_read(r8a66597, INTSTS1);
1612 intsts2 = r8a66597_read(r8a66597, INTSTS2);
1613 intenb0 = r8a66597_read(r8a66597, INTENB0);
1614 intenb1 = r8a66597_read(r8a66597, INTENB1);
1615 intenb2 = r8a66597_read(r8a66597, INTENB2);
1622 r8a66597_write(r8a66597, ~ATTCH, INTSTS2);
1623 r8a66597_bclr(r8a66597, ATTCHE, INTENB2);
1626 start_root_hub_sampling(r8a66597, 1, 1);
1629 r8a66597_write(r8a66597, ~DTCH, INTSTS2);
1630 r8a66597_bclr(r8a66597, DTCHE, INTENB2);
1631 r8a66597_usb_disconnect(r8a66597, 1);
1634 r8a66597_write(r8a66597, ~BCHG, INTSTS2);
1635 r8a66597_bclr(r8a66597, BCHGE, INTENB2);
1636 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1642 r8a66597_write(r8a66597, ~ATTCH, INTSTS1);
1643 r8a66597_bclr(r8a66597, ATTCHE, INTENB1);
1646 start_root_hub_sampling(r8a66597, 0, 1);
1649 r8a66597_write(r8a66597, ~DTCH, INTSTS1);
1650 r8a66597_bclr(r8a66597, DTCHE, INTENB1);
1651 r8a66597_usb_disconnect(r8a66597, 0);
1654 r8a66597_write(r8a66597, ~BCHG, INTSTS1);
1655 r8a66597_bclr(r8a66597, BCHGE, INTENB1);
1656 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1660 r8a66597_write(r8a66597, ~SIGN, INTSTS1);
1661 status = get_urb_error(r8a66597, 0);
1662 check_next_phase(r8a66597, status);
1665 r8a66597_write(r8a66597, ~SACK, INTSTS1);
1666 check_next_phase(r8a66597, 0);
1671 irq_pipe_ready(r8a66597);
1673 irq_pipe_empty(r8a66597);
1675 irq_pipe_nrdy(r8a66597);
1678 spin_unlock(&r8a66597->lock);
1683 static void r8a66597_root_hub_control(struct r8a66597 *r8a66597, int port)
1686 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
1691 tmp = r8a66597_read(r8a66597, dvstctr_reg);
1693 r8a66597_mdfy(r8a66597, UACT, USBRST | UACT,
1695 r8a66597_root_hub_start_polling(r8a66597);
1697 r8a66597_usb_connect(r8a66597, port);
1701 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port));
1702 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
1706 tmp = r8a66597_read(r8a66597, get_syssts_reg(port)) & LNST;
1710 r8a66597_check_syssts(r8a66597, port, tmp);
1712 r8a66597_root_hub_start_polling(r8a66597);
1716 r8a66597_root_hub_start_polling(r8a66597);
1724 struct r8a66597 *r8a66597 = timers->r8a66597;
1729 spin_lock_irqsave(&r8a66597->lock, flags);
1732 if (!(r8a66597->interval_map & (1 << pipenum)))
1734 if (timer_pending(&r8a66597->timers[pipenum].interval))
1737 td = r8a66597_get_td(r8a66597, pipenum);
1739 start_transfer(r8a66597, td);
1742 spin_unlock_irqrestore(&r8a66597->lock, flags);
1748 struct r8a66597 *r8a66597 = timers->r8a66597;
1754 spin_lock_irqsave(&r8a66597->lock, flags);
1756 if (!(r8a66597->timeout_map & (1 << pipenum)))
1758 if (timer_pending(&r8a66597->timers[pipenum].td))
1761 td = r8a66597_get_td(r8a66597, pipenum);
1763 r8a66597->timeout_map &= ~(1 << pipenum);
1768 set_td_timer(r8a66597, td);
1773 pipe_stop(r8a66597, pipe);
1779 &r8a66597->pipe_queue[pipenum]);
1780 new_td = r8a66597_get_td(r8a66597, pipenum);
1788 start_transfer(r8a66597, new_td);
1791 r8a66597->timeout_map &= ~(1 << pipenum);
1793 set_td_timer(r8a66597, new_td);
1796 spin_unlock_irqrestore(&r8a66597->lock, flags);
1801 struct r8a66597 *r8a66597 = from_timer(r8a66597, t, rh_timer);
1805 spin_lock_irqsave(&r8a66597->lock, flags);
1807 for (port = 0; port < r8a66597->max_root_hub; port++)
1808 r8a66597_root_hub_control(r8a66597, port);
1810 spin_unlock_irqrestore(&r8a66597->lock, flags);
1813 static int check_pipe_config(struct r8a66597 *r8a66597, struct urb *urb)
1815 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
1826 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1829 return enable_controller(r8a66597);
1834 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1836 disable_controller(r8a66597);
1839 static void set_address_zero(struct r8a66597 *r8a66597, struct urb *urb)
1845 get_port_number(r8a66597, urb->dev->devpath,
1847 set_devadd_reg(r8a66597, 0,
1849 get_parent_r8a66597_address(r8a66597, urb->dev),
1854 static struct r8a66597_td *r8a66597_make_td(struct r8a66597 *r8a66597,
1869 td->address = get_urb_to_r8a66597_addr(r8a66597, urb);
1887 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1892 spin_lock_irqsave(&r8a66597->lock, flags);
1893 if (!get_urb_to_r8a66597_dev(r8a66597, urb)) {
1911 init_pipe_info(r8a66597, urb, hep, &hep->desc);
1914 if (unlikely(check_pipe_config(r8a66597, urb)))
1915 init_pipe_config(r8a66597, urb);
1917 set_address_zero(r8a66597, urb);
1918 td = r8a66597_make_td(r8a66597, urb, hep);
1923 if (list_empty(&r8a66597->pipe_queue[td->pipenum]))
1925 list_add_tail(&td->queue, &r8a66597->pipe_queue[td->pipenum]);
1930 r8a66597->interval_map |= 1 << td->pipenum;
1931 mod_timer(&r8a66597->timers[td->pipenum].interval,
1935 ret = start_transfer(r8a66597, td);
1942 set_td_timer(r8a66597, td);
1948 spin_unlock_irqrestore(&r8a66597->lock, flags);
1955 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1960 spin_lock_irqsave(&r8a66597->lock, flags);
1967 pipe_stop(r8a66597, td->pipe);
1968 pipe_irq_disable(r8a66597, td->pipenum);
1969 disable_irq_empty(r8a66597, td->pipenum);
1970 finish_request(r8a66597, td, td->pipenum, urb, status);
1973 spin_unlock_irqrestore(&r8a66597->lock, flags);
1979 __acquires(r8a66597->lock)
1980 __releases(r8a66597->lock)
1982 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1993 spin_lock_irqsave(&r8a66597->lock, flags);
1997 spin_unlock_irqrestore(&r8a66597->lock, flags);
2001 pipe_stop(r8a66597, pipe);
2002 pipe_irq_disable(r8a66597, pipenum);
2003 disable_irq_empty(r8a66597, pipenum);
2004 td = r8a66597_get_td(r8a66597, pipenum);
2007 finish_request(r8a66597, td, pipenum, urb, -ESHUTDOWN);
2010 spin_unlock_irqrestore(&r8a66597->lock, flags);
2015 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2016 return r8a66597_read(r8a66597, FRMNUM) & 0x03FF;
2034 static struct r8a66597_device *get_r8a66597_device(struct r8a66597 *r8a66597,
2038 struct list_head *list = &r8a66597->child_device;
2047 printk(KERN_ERR "r8a66597: get_r8a66597_device fail.(%d)\n", addr);
2051 static void update_usb_address_map(struct r8a66597 *r8a66597,
2060 diff = r8a66597->child_connect_map[i] ^ map[i];
2070 set_child_connect_map(r8a66597, addr);
2074 spin_lock_irqsave(&r8a66597->lock, flags);
2075 dev = get_r8a66597_device(r8a66597, addr);
2076 disable_r8a66597_pipe_all(r8a66597, dev);
2077 free_usb_address(r8a66597, dev, 0);
2078 put_child_connect_map(r8a66597, addr);
2079 spin_unlock_irqrestore(&r8a66597->lock, flags);
2085 static void r8a66597_check_detect_child(struct r8a66597 *r8a66597,
2097 update_usb_address_map(r8a66597, bus->root_hub, now_map);
2104 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2108 r8a66597_check_detect_child(r8a66597, hcd);
2110 spin_lock_irqsave(&r8a66597->lock, flags);
2114 for (i = 0; i < r8a66597->max_root_hub; i++) {
2115 if (r8a66597->root_hub[i].port & 0xffff0000)
2119 spin_unlock_irqrestore(&r8a66597->lock, flags);
2124 static void r8a66597_hub_descriptor(struct r8a66597 *r8a66597,
2129 desc->bNbrPorts = r8a66597->max_root_hub;
2135 ((1 << r8a66597->max_root_hub) - 1) << 1;
2142 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2145 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2150 spin_lock_irqsave(&r8a66597->lock, flags);
2163 if (wIndex > r8a66597->max_root_hub)
2175 r8a66597_port_power(r8a66597, port, 0);
2189 r8a66597_hub_descriptor(r8a66597,
2196 if (wIndex > r8a66597->max_root_hub)
2201 if (wIndex > r8a66597->max_root_hub)
2210 r8a66597_port_power(r8a66597, port, 1);
2218 disable_r8a66597_pipe_all(r8a66597, dev);
2219 free_usb_address(r8a66597, dev, 1);
2221 r8a66597_mdfy(r8a66597, USBRST, USBRST | UACT,
2223 mod_timer(&r8a66597->rh_timer,
2238 spin_unlock_irqrestore(&r8a66597->lock, flags);
2245 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2248 dev_dbg(&r8a66597->device0.udev->dev, "%s\n", __func__);
2250 for (port = 0; port < r8a66597->max_root_hub; port++) {
2251 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2258 r8a66597_bclr(r8a66597, UACT, dvstctr_reg); /* suspend */
2263 r8a66597_bset(r8a66597, RWUPE, dvstctr_reg);
2264 r8a66597_write(r8a66597, ~BCHG, get_intsts_reg(port));
2265 r8a66597_bset(r8a66597, BCHGE, get_intenb_reg(port));
2269 r8a66597->bus_suspended = 1;
2276 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2279 dev_dbg(&r8a66597->device0.udev->dev, "%s\n", __func__);
2281 for (port = 0; port < r8a66597->max_root_hub; port++) {
2282 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2291 r8a66597_mdfy(r8a66597, RESUME, RESUME | UACT, dvstctr_reg);
2293 r8a66597_mdfy(r8a66597, UACT, RESUME | UACT, dvstctr_reg);
2306 .hcd_priv_size = sizeof(struct r8a66597),
2341 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2346 disable_controller(r8a66597);
2348 for (port = 0; port < r8a66597->max_root_hub; port++) {
2349 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2359 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2360 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
2364 enable_controller(r8a66597);
2384 struct r8a66597 *r8a66597 = platform_get_drvdata(pdev);
2385 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
2387 del_timer_sync(&r8a66597->rh_timer);
2389 iounmap(r8a66597->reg);
2390 if (r8a66597->pdata->on_chip)
2391 clk_put(r8a66597->clk);
2402 struct r8a66597 *r8a66597;
2448 r8a66597 = hcd_to_r8a66597(hcd);
2449 memset(r8a66597, 0, sizeof(struct r8a66597));
2450 platform_set_drvdata(pdev, r8a66597);
2451 r8a66597->pdata = dev_get_platdata(&pdev->dev);
2452 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW;
2454 if (r8a66597->pdata->on_chip) {
2456 r8a66597->clk = clk_get(&pdev->dev, clk_name);
2457 if (IS_ERR(r8a66597->clk)) {
2460 ret = PTR_ERR(r8a66597->clk);
2463 r8a66597->max_root_hub = 1;
2465 r8a66597->max_root_hub = 2;
2467 spin_lock_init(&r8a66597->lock);
2468 timer_setup(&r8a66597->rh_timer, r8a66597_timer, 0);
2469 r8a66597->reg = reg;
2472 ret = r8a66597_clock_enable(r8a66597);
2475 disable_controller(r8a66597);
2478 INIT_LIST_HEAD(&r8a66597->pipe_queue[i]);
2479 r8a66597->timers[i].r8a66597 = r8a66597;
2480 timer_setup(&r8a66597->timers[i].td, r8a66597_td_timer, 0);
2481 timer_setup(&r8a66597->timers[i].interval,
2484 INIT_LIST_HEAD(&r8a66597->child_device);
2499 if (r8a66597->pdata->on_chip)
2500 clk_put(r8a66597->clk);