Lines Matching refs:xhci_pdev
1037 void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev)
1046 if (xhci_pdev->subsystem_vendor == PCI_VENDOR_ID_SONY &&
1047 xhci_pdev->subsystem_device == 0x90a8)
1067 dev_warn(&xhci_pdev->dev,
1069 dev_warn(&xhci_pdev->dev,
1071 usb_disable_xhci_ports(xhci_pdev);
1078 pci_read_config_dword(xhci_pdev, USB_INTEL_USB3PRM,
1081 dev_dbg(&xhci_pdev->dev, "Configurable ports to enable SuperSpeed: 0x%x\n",
1088 pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
1091 pci_read_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
1093 dev_dbg(&xhci_pdev->dev,
1101 pci_read_config_dword(xhci_pdev, USB_INTEL_USB2PRM,
1104 dev_dbg(&xhci_pdev->dev, "Configurable USB 2.0 ports to hand over to xCHI: 0x%x\n",
1111 pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
1114 pci_read_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
1116 dev_dbg(&xhci_pdev->dev,
1122 void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
1124 pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 0x0);
1125 pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 0x0);