Lines Matching refs:pdev
197 struct pci_dev *pdev = to_pci_dev(dev);
199 pci_read_config_word(pdev, 0x50, &misc);
201 pci_write_config_word(pdev, 0x50, misc & 0xfcff);
203 pci_write_config_word(pdev, 0x50, misc | 0x0300);
287 int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev)
293 dev_dbg(&pdev->dev, "QUIRK: Enable AMD remote wakeup fix\n");
461 static int usb_asmedia_wait_write(struct pci_dev *pdev)
468 pci_read_config_byte(pdev, ASMT_CONTROL_REG, &value);
471 dev_err(&pdev->dev, "%s: check_ready ERROR", __func__);
481 dev_warn(&pdev->dev, "%s: check_write_ready timeout", __func__);
485 void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev)
487 if (usb_asmedia_wait_write(pdev) != 0)
491 pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, ASMT_WRITEREG_CMD);
492 pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, ASMT_FLOWCTL_ADDR);
493 pci_write_config_byte(pdev, ASMT_CONTROL_REG, ASMT_CONTROL_WRITE_BIT);
495 if (usb_asmedia_wait_write(pdev) != 0)
499 pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, ASMT_FLOWCTL_DATA);
500 pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, ASMT_PSEUDO_DATA);
501 pci_write_config_byte(pdev, ASMT_CONTROL_REG, ASMT_CONTROL_WRITE_BIT);
551 struct pci_dev *pdev;
554 pdev = to_pci_dev(device);
555 pci_write_config_word(pdev, PT_ADDR_INDX, PT_SIG_1_ADDR);
557 pci_read_config_byte(pdev, PT_READ_INDX, &value);
561 pci_write_config_word(pdev, PT_ADDR_INDX, PT_SIG_2_ADDR);
563 pci_read_config_byte(pdev, PT_READ_INDX, &value);
567 pci_write_config_word(pdev, PT_ADDR_INDX, PT_SIG_3_ADDR);
569 pci_read_config_byte(pdev, PT_READ_INDX, &value);
573 pci_write_config_word(pdev, PT_ADDR_INDX, PT_SIG_4_ADDR);
575 pci_read_config_byte(pdev, PT_READ_INDX, &value);
580 switch (pdev->device) {
627 pci_write_config_word(pdev, PT_ADDR_INDX, reg);
628 pci_read_config_byte(pdev, PT_READ_INDX, &value);
638 void uhci_reset_hc(struct pci_dev *pdev, unsigned long base)
643 pci_write_config_word(pdev, UHCI_USBLEGSUP, UHCI_USBLEGSUP_RWC);
654 dev_warn(&pdev->dev, "HCRESET not completed yet!\n");
670 int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base)
685 pci_read_config_word(pdev, UHCI_USBLEGSUP, &legsup);
687 dev_dbg(&pdev->dev, "%s: legsup = 0x%04x\n",
695 dev_dbg(&pdev->dev, "%s: cmd = 0x%04x\n",
702 dev_dbg(&pdev->dev, "%s: intr = 0x%04x\n",
709 dev_dbg(&pdev->dev, "Performing full reset\n");
710 uhci_reset_hc(pdev, base);
715 static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask)
718 return !pci_read_config_word(pdev, PCI_COMMAND, &cmd) && (cmd & mask);
724 static void quirk_usb_handoff_uhci(struct pci_dev *pdev)
729 if (!pio_enabled(pdev))
733 if ((pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
734 base = pci_resource_start(pdev, i);
739 uhci_check_and_reset_hc(pdev, base);
742 static int mmio_resource_enabled(struct pci_dev *pdev, int idx)
744 return pci_resource_start(pdev, idx) && mmio_enabled(pdev);
747 static void quirk_usb_handoff_ohci(struct pci_dev *pdev)
755 if (!mmio_resource_enabled(pdev, 0))
758 base = pci_ioremap_bar(pdev, 0);
766 if (pdev->vendor == PCI_VENDOR_ID_AL && pdev->device == 0x5237)
787 dev_warn(&pdev->dev,
853 static void ehci_bios_handoff(struct pci_dev *pdev,
865 if (pdev->vendor == 0x8086 && (pdev->device == 0x283a ||
866 pdev->device == 0x27cc)) {
872 dev_dbg(&pdev->dev, "EHCI: BIOS handoff\n");
883 pci_read_config_dword(pdev, offset + EHCI_USBLEGCTLSTS, &val);
884 pci_write_config_dword(pdev, offset + EHCI_USBLEGCTLSTS,
892 pci_write_config_byte(pdev, offset + 3, 1);
902 pci_read_config_dword(pdev, offset, &cap);
911 dev_warn(&pdev->dev,
914 pci_write_config_byte(pdev, offset + 2, 0);
918 pci_write_config_dword(pdev, offset + EHCI_USBLEGCTLSTS, 0);
927 static void quirk_usb_disable_ehci(struct pci_dev *pdev)
934 if (!mmio_resource_enabled(pdev, 0))
937 base = pci_ioremap_bar(pdev, 0);
951 pci_read_config_dword(pdev, offset, &cap);
955 ehci_bios_handoff(pdev, op_reg_base, cap, offset);
961 dev_warn(&pdev->dev,
968 dev_printk(KERN_DEBUG, &pdev->dev, "EHCI: capability loop?\n");
1137 static void quirk_usb_handoff_xhci(struct pci_dev *pdev)
1144 int len = pci_resource_len(pdev, 0);
1146 if (!mmio_resource_enabled(pdev, 0))
1149 base = ioremap(pci_resource_start(pdev, 0), len);
1164 dev_warn(&pdev->dev, "xHCI controller failing to respond");
1170 if ((pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241) ||
1171 (pdev->vendor == PCI_VENDOR_ID_RENESAS
1172 && pdev->device == 0x0014)) {
1187 dev_warn(&pdev->dev,
1203 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
1204 usb_enable_intel_xhci_ports(pdev);
1216 dev_warn(&pdev->dev,
1231 dev_warn(&pdev->dev,
1240 static void quirk_usb_early_handoff(struct pci_dev *pdev)
1248 if (pdev->vendor == 0x184e) /* vendor Netlogic */
1255 if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
1256 parent = of_get_parent(pdev->bus->dev.of_node);
1263 if (pdev->class != PCI_CLASS_SERIAL_USB_UHCI &&
1264 pdev->class != PCI_CLASS_SERIAL_USB_OHCI &&
1265 pdev->class != PCI_CLASS_SERIAL_USB_EHCI &&
1266 pdev->class != PCI_CLASS_SERIAL_USB_XHCI)
1269 if (pci_enable_device(pdev) < 0) {
1270 dev_warn(&pdev->dev,
1274 if (pdev->class == PCI_CLASS_SERIAL_USB_UHCI)
1275 quirk_usb_handoff_uhci(pdev);
1276 else if (pdev->class == PCI_CLASS_SERIAL_USB_OHCI)
1277 quirk_usb_handoff_ohci(pdev);
1278 else if (pdev->class == PCI_CLASS_SERIAL_USB_EHCI)
1279 quirk_usb_disable_ehci(pdev);
1280 else if (pdev->class == PCI_CLASS_SERIAL_USB_XHCI)
1281 quirk_usb_handoff_xhci(pdev);
1282 pci_disable_device(pdev);