Lines Matching defs:pxa_ohci
138 static int pxa27x_ohci_select_pmm(struct pxa27x_ohci *pxa_ohci, int mode)
140 uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA);
141 uint32_t uhcrhdb = __raw_readl(pxa_ohci->mmio_base + UHCRHDB);
165 __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA);
166 __raw_writel(uhcrhdb, pxa_ohci->mmio_base + UHCRHDB);
170 static int pxa27x_ohci_set_vbus_power(struct pxa27x_ohci *pxa_ohci,
173 struct regulator *vbus = pxa_ohci->vbus[port];
179 if (enable && !pxa_ohci->vbus_enabled[port])
181 else if (!enable && pxa_ohci->vbus_enabled[port])
187 pxa_ohci->vbus_enabled[port] = enable;
195 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd);
207 ret = pxa27x_ohci_set_vbus_power(pxa_ohci, wIndex - 1,
218 static inline void pxa27x_setup_hc(struct pxa27x_ohci *pxa_ohci,
221 uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR);
222 uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA);
254 __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR);
255 __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA);
258 static inline void pxa27x_reset_hc(struct pxa27x_ohci *pxa_ohci)
260 uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR);
262 __raw_writel(uhchr | UHCHR_FHR, pxa_ohci->mmio_base + UHCHR);
264 __raw_writel(uhchr & ~UHCHR_FHR, pxa_ohci->mmio_base + UHCHR);
267 static int pxa27x_start_hc(struct pxa27x_ohci *pxa_ohci, struct device *dev)
275 retval = clk_prepare_enable(pxa_ohci->clk);
279 pxa27x_reset_hc(pxa_ohci);
281 uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR) | UHCHR_FSBIR;
282 __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR);
284 while (__raw_readl(pxa_ohci->mmio_base + UHCHR) & UHCHR_FSBIR)
287 pxa27x_setup_hc(pxa_ohci, inf);
293 clk_disable_unprepare(pxa_ohci->clk);
297 uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR) & ~UHCHR_SSE;
298 __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR);
299 __raw_writel(UHCHIE_UPRIE | UHCHIE_RWIE, pxa_ohci->mmio_base + UHCHIE);
306 static void pxa27x_stop_hc(struct pxa27x_ohci *pxa_ohci, struct device *dev)
316 pxa27x_reset_hc(pxa_ohci);
319 uhccoms = __raw_readl(pxa_ohci->mmio_base + UHCCOMS) | 0x01;
320 __raw_writel(uhccoms, pxa_ohci->mmio_base + UHCCOMS);
323 clk_disable_unprepare(pxa_ohci->clk);
409 struct pxa27x_ohci *pxa_ohci;
447 pxa_ohci = to_pxa27x_ohci(hcd);
448 pxa_ohci->clk = usb_clk;
449 pxa_ohci->mmio_base = (void __iomem *)hcd->regs;
458 pxa_ohci->vbus[i] = devm_regulator_get(&pdev->dev, name);
461 retval = pxa27x_start_hc(pxa_ohci, &pdev->dev);
468 pxa27x_ohci_select_pmm(pxa_ohci, inf->port_mode);
483 pxa27x_stop_hc(pxa_ohci, &pdev->dev);
506 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd);
510 pxa27x_stop_hc(pxa_ohci, &pdev->dev);
513 pxa27x_ohci_set_vbus_power(pxa_ohci, i, false);
524 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd);
538 pxa27x_stop_hc(pxa_ohci, dev);
545 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd);
554 status = pxa27x_start_hc(pxa_ohci, dev);
559 pxa27x_ohci_select_pmm(pxa_ohci, inf->port_mode);