Lines Matching refs:val
1280 u32 val;
1287 val = isp116x_read_reg32(isp116x, HCRHDESCA);
1288 val &= ~(RH_A_NPS | RH_A_PSM);
1289 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1303 u32 val;
1312 val = isp116x_read_reg16(isp116x, HCCHIPID);
1313 if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
1314 ERR("Invalid chip ID %04x\n", val);
1326 val = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
1328 val |= HCHWCFG_15KRSEL;
1331 val |= HCHWCFG_CLKNOTSTOP;
1333 val |= HCHWCFG_ANALOG_OC;
1335 val |= HCHWCFG_INT_POL;
1337 val |= HCHWCFG_INT_TRIGGER;
1338 isp116x_write_reg16(isp116x, HCHWCFG, val);
1341 val = (25 << 24) & RH_A_POTPGT;
1345 val |= RH_A_PSM;
1347 val |= RH_A_OCPM;
1348 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1351 val = RH_B_PPCM;
1352 isp116x_write_reg32(isp116x, HCRHDESCB, val);
1355 val = 0;
1359 val |= RH_HS_DRWE;
1361 isp116x_write_reg32(isp116x, HCRHSTATUS, val);
1377 val = HCCONTROL_USB_OPER;
1379 val |= HCCONTROL_RWE;
1380 isp116x_write_reg32(isp116x, HCCONTROL, val);
1397 u32 val;
1401 val = isp116x_read_reg32(isp116x, HCCONTROL);
1403 switch (val & HCCONTROL_HCFS) {
1406 val &= (~HCCONTROL_HCFS & ~HCCONTROL_RWE);
1407 val |= HCCONTROL_USB_SUSPEND;
1409 val |= HCCONTROL_RWE;
1413 isp116x_write_reg32(isp116x, HCCONTROL, val);
1420 (val & ~HCCONTROL_HCFS) |
1437 u32 val;
1442 val = isp116x_read_reg32(isp116x, HCCONTROL);
1443 switch (val & HCCONTROL_HCFS) {
1445 val &= ~HCCONTROL_HCFS;
1446 val |= HCCONTROL_USB_RESUME;
1447 isp116x_write_reg32(isp116x, HCCONTROL, val);
1469 val = isp116x->rhdesca & RH_A_NDP;
1470 while (val--) {
1472 isp116x_read_reg32(isp116x, val ? HCRHPORT2 : HCRHPORT1);
1476 DBG("%s: Resuming port %d\n", __func__, val);
1477 isp116x_write_reg32(isp116x, RH_PS_POCI, val
1487 val = isp116x_read_reg32(isp116x, HCCONTROL);
1489 (val & ~HCCONTROL_HCFS) | HCCONTROL_USB_OPER);