Lines Matching refs:ehci
7 /* this file is part of ehci-hcd.c */
32 periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
35 switch (hc32_to_cpu(ehci, tag)) {
49 shadow_next_periodic(struct ehci_hcd *ehci, union ehci_shadow *periodic,
52 switch (hc32_to_cpu(ehci, tag)) {
62 /* caller must hold ehci->lock */
63 static void periodic_unlink(struct ehci_hcd *ehci, unsigned frame, void *ptr)
65 union ehci_shadow *prev_p = &ehci->pshadow[frame];
66 __hc32 *hw_p = &ehci->periodic[frame];
71 prev_p = periodic_next_shadow(ehci, prev_p,
72 Q_NEXT_TYPE(ehci, *hw_p));
73 hw_p = shadow_next_periodic(ehci, &here,
74 Q_NEXT_TYPE(ehci, *hw_p));
84 *prev_p = *periodic_next_shadow(ehci, &here,
85 Q_NEXT_TYPE(ehci, *hw_p));
87 if (!ehci->use_dummy_qh ||
88 *shadow_next_periodic(ehci, &here, Q_NEXT_TYPE(ehci, *hw_p))
89 != EHCI_LIST_END(ehci))
90 *hw_p = *shadow_next_periodic(ehci, &here,
91 Q_NEXT_TYPE(ehci, *hw_p));
93 *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
137 struct ehci_hcd *ehci =
148 list_add_tail(&tt->tt_list, &ehci->tt_list);
194 static void bandwidth_dbg(struct ehci_hcd *ehci, int sign, char *type,
206 static void reserve_release_intr_bandwidth(struct ehci_hcd *ehci,
220 bandwidth_dbg(ehci, sign, "intr", &qh->ps);
231 ehci->bandwidth[i] += usecs;
240 ehci->bandwidth[i+j] += c_usecs;
354 struct ehci_hcd *ehci,
377 tt_usecs[i] = ehci->tt_budget[uf];
414 struct ehci_hcd *ehci,
428 for (; frame < ehci->periodic_size; frame += period) {
433 here = ehci->pshadow[frame];
434 type = Q_NEXT_TYPE(ehci, ehci->periodic[frame]);
436 switch (hc32_to_cpu(ehci, type)) {
438 type = Q_NEXT_TYPE(ehci, here.itd->hw_next);
446 mask = hc32_to_cpu(ehci,
453 type = Q_NEXT_TYPE(ehci, hw->hw_next);
460 mask = hc32_to_cpu(ehci, here.sitd
467 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
472 ehci_dbg(ehci,
490 static void enable_periodic(struct ehci_hcd *ehci)
492 if (ehci->periodic_count++)
496 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_PERIODIC);
499 ehci_poll_PSS(ehci);
501 turn_on_io_watchdog(ehci);
504 static void disable_periodic(struct ehci_hcd *ehci)
506 if (--ehci->periodic_count)
510 ehci_poll_PSS(ehci);
519 * no FSTN support (yet; ehci 0.96+)
521 static void qh_link_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
528 period, hc32_to_cpup(ehci, &qh->hw->hw_info2)
536 for (i = qh->ps.phase; i < ehci->periodic_size; i += period) {
537 union ehci_shadow *prev = &ehci->pshadow[i];
538 __hc32 *hw_p = &ehci->periodic[i];
544 type = Q_NEXT_TYPE(ehci, *hw_p);
545 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
547 prev = periodic_next_shadow(ehci, prev, type);
548 hw_p = shadow_next_periodic(ehci, &here, type);
569 *hw_p = QH_NEXT(ehci, qh->qh_dma);
577 ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->ps.bw_period
581 list_add(&qh->intr_node, &ehci->intr_qh_list);
584 ++ehci->intr_count;
585 enable_periodic(ehci);
588 static void qh_unlink_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
611 for (i = qh->ps.phase; i < ehci->periodic_size; i += period)
612 periodic_unlink(ehci, i, qh);
615 ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->ps.bw_period
622 hc32_to_cpup(ehci, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
629 if (ehci->qh_scan_next == qh)
630 ehci->qh_scan_next = list_entry(qh->intr_node.next,
635 static void cancel_unlink_wait_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
649 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
656 cancel_unlink_wait_intr(ehci, qh);
658 qh_unlink_periodic(ehci, qh);
668 qh->unlink_cycle = ehci->intr_unlink_cycle;
671 list_add_tail(&qh->unlink_node, &ehci->intr_unlink);
673 if (ehci->intr_unlinking)
675 else if (ehci->rh_state < EHCI_RH_RUNNING)
676 ehci_handle_intr_unlinks(ehci);
677 else if (ehci->intr_unlink.next == &qh->unlink_node) {
678 ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true);
679 ++ehci->intr_unlink_cycle;
688 static void start_unlink_intr_wait(struct ehci_hcd *ehci,
691 qh->unlink_cycle = ehci->intr_unlink_wait_cycle;
694 list_add_tail(&qh->unlink_node, &ehci->intr_unlink_wait);
696 if (ehci->rh_state < EHCI_RH_RUNNING)
697 ehci_handle_start_intr_unlinks(ehci);
698 else if (ehci->intr_unlink_wait.next == &qh->unlink_node) {
699 ehci_enable_event(ehci, EHCI_HRTIMER_START_UNLINK_INTR, true);
700 ++ehci->intr_unlink_wait_cycle;
704 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
710 hw->hw_next = EHCI_LIST_END(ehci);
713 qh_completions(ehci, qh);
716 if (!list_empty(&qh->qtd_list) && ehci->rh_state == EHCI_RH_RUNNING) {
717 rc = qh_schedule(ehci, qh);
719 qh_refresh(ehci, qh);
720 qh_link_periodic(ehci, qh);
730 ehci_err(ehci, "can't reschedule qh %p, err %d\n",
736 --ehci->intr_count;
737 disable_periodic(ehci);
743 struct ehci_hcd *ehci,
756 usecs = ehci->uframe_periodic_max - usecs;
760 if (ehci->bandwidth[uframe] > usecs)
769 struct ehci_hcd *ehci,
783 if (!check_period(ehci, frame, uframe, qh->ps.bw_uperiod, qh->ps.usecs))
792 if (tt_available(ehci, &qh->ps, tt, frame, uframe)) {
797 if (!check_period(ehci, frame, i,
819 if (tt_no_collision(ehci, qh->ps.bw_period, qh->ps.udev, frame, mask)) {
820 if (!check_period(ehci, frame, uframe + qh->gap_uf + 1,
823 if (!check_period(ehci, frame, uframe + qh->gap_uf,
836 static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh)
844 hw->hw_next = EHCI_LIST_END(ehci);
848 ehci_dbg(ehci, "reused qh %p schedule\n", qh);
859 compute_tt_budget(ehci->tt_budget, tt);
870 frame = ++ehci->random_frame & (qh->ps.bw_period - 1);
872 status = check_intr_schedule(ehci,
881 status = check_intr_schedule(ehci, 0, 0, qh, &c_mask, tt);
887 qh->ps.phase = (qh->ps.period ? ehci->random_frame &
896 hw->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
897 hw->hw_info2 |= cpu_to_hc32(ehci, qh->ps.cs_mask);
898 reserve_release_intr_bandwidth(ehci, qh, 1);
905 struct ehci_hcd *ehci,
919 spin_lock_irqsave(&ehci->lock, flags);
921 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
925 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
931 qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv);
937 status = qh_schedule(ehci, qh);
943 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
948 qh_refresh(ehci, qh);
949 qh_link_periodic(ehci, qh);
952 cancel_unlink_wait_intr(ehci, qh);
956 ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
960 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
962 spin_unlock_irqrestore(&ehci->lock, flags);
964 qtd_list_free(ehci, urb, qtd_list);
969 static void scan_intr(struct ehci_hcd *ehci)
973 list_for_each_entry_safe(qh, ehci->qh_scan_next, &ehci->intr_qh_list,
982 * drops the lock. That's why ehci->qh_scan_next
984 * gets unlinked then ehci->qh_scan_next is adjusted
987 temp = qh_completions(ehci, qh);
989 start_unlink_intr(ehci, qh);
992 start_unlink_intr_wait(ehci, qh);
1018 struct ehci_hcd *ehci,
1049 stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum);
1050 stream->buf1 = cpu_to_hc32(ehci, buf1);
1051 stream->buf2 = cpu_to_hc32(ehci, multi);
1076 if (!ehci_is_TDI(ehci)
1078 ehci_to_hcd(ehci)->self.root_hub))
1115 stream->address = cpu_to_hc32(ehci, addr);
1126 iso_stream_find(struct ehci_hcd *ehci, struct urb *urb)
1139 spin_lock_irqsave(&ehci->lock, flags);
1146 iso_stream_init(ehci, stream, urb);
1151 ehci_dbg(ehci, "dev %s ep%d%s, not iso??\n",
1157 spin_unlock_irqrestore(&ehci->lock, flags);
1179 struct ehci_hcd *ehci,
1209 uframe->transaction = cpu_to_hc32(ehci, trans);
1227 /* caller must hold ehci->lock! */
1235 struct ehci_hcd *ehci,
1251 itd_sched_init(ehci, sched, stream, urb);
1259 spin_lock_irqsave(&ehci->lock, flags);
1269 if (itd->frame == ehci->now_frame)
1275 spin_unlock_irqrestore(&ehci->lock, flags);
1276 itd = dma_pool_alloc(ehci->itd_pool, mem_flags,
1278 spin_lock_irqsave(&ehci->lock, flags);
1281 spin_unlock_irqrestore(&ehci->lock, flags);
1291 spin_unlock_irqrestore(&ehci->lock, flags);
1301 static void reserve_release_iso_bandwidth(struct ehci_hcd *ehci,
1316 bandwidth_dbg(ehci, sign, "iso", &stream->ps);
1327 ehci->bandwidth[i] += usecs;
1339 ehci->bandwidth[i+j] += usecs;
1341 ehci->bandwidth[i+j] += c_usecs;
1365 struct ehci_hcd *ehci,
1373 usecs = ehci->uframe_periodic_max - stream->ps.usecs;
1377 if (ehci->bandwidth[uframe] > usecs)
1385 struct ehci_hcd *ehci,
1414 if (!tt_available(ehci, &stream->ps, tt, frame, uf))
1420 if (!tt_no_collision(ehci, stream->ps.bw_period,
1431 max_used = ehci->uframe_periodic_max - stream->ps.usecs;
1433 if (ehci->bandwidth[uf] > max_used)
1439 max_used = ehci->uframe_periodic_max -
1446 if (ehci->bandwidth[uf+i] > max_used)
1455 stream->splits = cpu_to_hc32(ehci, stream->ps.cs_mask);
1464 * Also avoid queue depths of less than ehci's worst irq latency (affected
1472 struct ehci_hcd *ehci,
1480 unsigned mod = ehci->periodic_size << 3;
1492 ehci_to_hcd(ehci), urb->ep))) {
1503 compute_tt_budget(ehci->tt_budget, tt);
1505 start = ((-(++ehci->random_frame)) << 3) & (period - 1);
1518 if (itd_slot_ok(ehci, stream, start))
1523 if (sitd_slot_ok(ehci, stream, start,
1531 ehci_dbg(ehci, "iso sched full %p", urb);
1540 reserve_release_iso_bandwidth(ehci, stream, 1);
1552 now = ehci_read_frame_index(ehci) & (mod - 1);
1555 if (ehci->i_thresh)
1556 next = now + ehci->i_thresh; /* uframe cache */
1561 if (ehci->isoc_count == 0)
1562 ehci->last_iso_frame = now >> 3;
1565 * Use ehci->last_iso_frame as the base. There can't be any
1568 base = ehci->last_iso_frame << 3;
1585 ehci_dbg(ehci, "request %p would overflow (%u-%u < %u mod %u)\n",
1614 ehci_dbg(ehci, "iso underrun %p (%u+%u < %u) [%u]\n",
1641 ehci_dbg(ehci, "request %p would overflow (%u+%u >= %u)\n",
1665 itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1671 itd->hw_next = EHCI_LIST_END(ehci);
1684 struct ehci_hcd *ehci,
1700 itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
1701 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0);
1702 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1709 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0);
1710 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32));
1715 itd_link(struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1717 union ehci_shadow *prev = &ehci->pshadow[frame];
1718 __hc32 *hw_p = &ehci->periodic[frame];
1724 type = Q_NEXT_TYPE(ehci, *hw_p);
1725 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
1727 prev = periodic_next_shadow(ehci, prev, type);
1728 hw_p = shadow_next_periodic(ehci, &here, type);
1737 *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1742 struct ehci_hcd *ehci,
1756 ehci_to_hcd(ehci)->self.bandwidth_allocated
1759 if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
1760 if (ehci->amd_pll_fix == 1)
1764 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1780 itd_init(ehci, stream, itd);
1786 itd_patch(ehci, itd, iso_sched, packet, uframe);
1795 itd_link(ehci, frame & (ehci->periodic_size - 1), itd);
1805 ++ehci->isoc_count;
1806 enable_periodic(ehci);
1821 static bool itd_complete(struct ehci_hcd *ehci, struct ehci_itd *itd)
1838 t = hc32_to_cpup(ehci, &itd->hw_transaction[uframe]);
1879 ehci_urb_done(ehci, urb, 0);
1883 --ehci->isoc_count;
1884 disable_periodic(ehci);
1886 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1887 if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
1888 if (ehci->amd_pll_fix == 1)
1893 ehci_to_hcd(ehci)->self.bandwidth_allocated
1905 &ehci->cached_itd_list);
1906 start_free_itds(ehci);
1914 static int itd_submit(struct ehci_hcd *ehci, struct urb *urb,
1922 stream = iso_stream_find(ehci, urb);
1924 ehci_dbg(ehci, "can't get iso stream\n");
1928 ehci_dbg(ehci, "can't change iso interval %d --> %d\n",
1934 ehci_dbg(ehci,
1945 status = itd_urb_transaction(stream, ehci, urb, mem_flags);
1947 ehci_dbg(ehci, "can't init itds\n");
1952 spin_lock_irqsave(&ehci->lock, flags);
1953 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1957 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1960 status = iso_stream_schedule(ehci, urb, stream);
1962 itd_link_urb(ehci, urb, ehci->periodic_size << 3, stream);
1965 ehci_urb_done(ehci, urb, 0);
1967 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1970 spin_unlock_irqrestore(&ehci->lock, flags);
1984 struct ehci_hcd *ehci,
2013 packet->transaction = cpu_to_hc32(ehci, trans);
2034 struct ehci_hcd *ehci,
2049 sitd_sched_init(ehci, iso_sched, stream, urb);
2052 spin_lock_irqsave(&ehci->lock, flags);
2067 if (sitd->frame == ehci->now_frame)
2073 spin_unlock_irqrestore(&ehci->lock, flags);
2074 sitd = dma_pool_alloc(ehci->sitd_pool, mem_flags,
2076 spin_lock_irqsave(&ehci->lock, flags);
2079 spin_unlock_irqrestore(&ehci->lock, flags);
2094 spin_unlock_irqrestore(&ehci->lock, flags);
2102 struct ehci_hcd *ehci,
2112 sitd->hw_next = EHCI_LIST_END(ehci);
2116 sitd->hw_backpointer = EHCI_LIST_END(ehci);
2119 sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp);
2120 sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32);
2122 sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1);
2125 sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32);
2130 sitd_link(struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
2133 sitd->sitd_next = ehci->pshadow[frame];
2134 sitd->hw_next = ehci->periodic[frame];
2135 ehci->pshadow[frame].sitd = sitd;
2138 ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
2143 struct ehci_hcd *ehci,
2158 ehci_to_hcd(ehci)->self.bandwidth_allocated
2161 if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
2162 if (ehci->amd_pll_fix == 1)
2166 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
2184 sitd_patch(ehci, stream, sitd, sched, packet);
2185 sitd_link(ehci, (next_uframe >> 3) & (ehci->periodic_size - 1),
2196 ++ehci->isoc_count;
2197 enable_periodic(ehci);
2215 static bool sitd_complete(struct ehci_hcd *ehci, struct ehci_sitd *sitd)
2226 t = hc32_to_cpup(ehci, &sitd->hw_results);
2259 ehci_urb_done(ehci, urb, 0);
2263 --ehci->isoc_count;
2264 disable_periodic(ehci);
2266 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
2267 if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
2268 if (ehci->amd_pll_fix == 1)
2273 ehci_to_hcd(ehci)->self.bandwidth_allocated
2285 &ehci->cached_sitd_list);
2286 start_free_itds(ehci);
2293 static int sitd_submit(struct ehci_hcd *ehci, struct urb *urb,
2301 stream = iso_stream_find(ehci, urb);
2303 ehci_dbg(ehci, "can't get iso stream\n");
2307 ehci_dbg(ehci, "can't change iso interval %d --> %d\n",
2313 ehci_dbg(ehci,
2322 status = sitd_urb_transaction(stream, ehci, urb, mem_flags);
2324 ehci_dbg(ehci, "can't init sitds\n");
2329 spin_lock_irqsave(&ehci->lock, flags);
2330 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
2334 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
2337 status = iso_stream_schedule(ehci, urb, stream);
2339 sitd_link_urb(ehci, urb, ehci->periodic_size << 3, stream);
2342 ehci_urb_done(ehci, urb, 0);
2344 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
2347 spin_unlock_irqrestore(&ehci->lock, flags);
2354 static void scan_isoc(struct ehci_hcd *ehci)
2357 unsigned fmask = ehci->periodic_size - 1;
2367 if (ehci->rh_state >= EHCI_RH_RUNNING) {
2368 uf = ehci_read_frame_index(ehci);
2372 now_frame = (ehci->last_iso_frame - 1) & fmask;
2375 ehci->now_frame = now_frame;
2377 frame = ehci->last_iso_frame;
2381 q_p = &ehci->pshadow[frame];
2382 hw_p = &ehci->periodic[frame];
2384 type = Q_NEXT_TYPE(ehci, *hw_p);
2388 switch (hc32_to_cpu(ehci, type)) {
2400 ITD_ACTIVE(ehci))
2406 type = Q_NEXT_TYPE(ehci,
2420 if (!ehci->use_dummy_qh ||
2421 q.itd->hw_next != EHCI_LIST_END(ehci))
2424 *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
2425 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2427 modified = itd_complete(ehci, q.itd);
2440 && (q.sitd->hw_results & SITD_ACTIVE(ehci))) {
2444 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2455 if (!ehci->use_dummy_qh ||
2456 q.sitd->hw_next != EHCI_LIST_END(ehci))
2459 *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
2460 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2462 modified = sitd_complete(ehci, q.sitd);
2466 ehci_dbg(ehci, "corrupt type %d frame %d shadow %p\n",
2478 if (unlikely(modified && ehci->isoc_count > 0))
2487 ehci->last_iso_frame = frame;