Lines Matching refs:ehci_readl
59 status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
73 status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
110 status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
131 if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)
140 if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC)
168 temp = ehci_readl(ehci, hostpc_reg);
179 u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
200 temp = ehci_readl(ehci, hostpc_reg);
258 u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
322 t3 = ehci_readl(ehci, hostpc_reg);
324 t3 = ehci_readl(ehci, hostpc_reg);
362 ehci_readl(ehci, &ehci->regs->intr_enable);
403 power_okay = ehci_readl(ehci, &ehci->regs->intr_enable);
429 temp = ehci_readl(ehci, &ehci->regs->port_status[i]);
451 temp = ehci_readl(ehci, hostpc_reg);
466 temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
490 temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
507 (void) ehci_readl(ehci, &ehci->regs->intr_enable);
552 port_status = ehci_readl(ehci, status_reg);
659 ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16;
664 temp = ehci_readl(ehci, &ehci->regs->port_status[i]);
782 temp = ehci_readl(ehci, status_reg);
818 temp1 = ehci_readl(ehci, hostpc_reg);
855 ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
871 temp = ehci_readl(ehci, status_reg);
901 temp = ehci_readl(ehci, status_reg);
942 temp = ehci_readl(ehci, status_reg);
965 ehci_readl(ehci, status_reg));
975 temp = ehci_readl(ehci, status_reg);
988 temp1 = ehci_readl(ehci, hostpc_reg);
1046 temp = ehci_readl(ehci, status_reg);
1070 temp1 = ehci_readl(ehci, hostpc_reg);
1073 temp1 = ehci_readl(ehci, hostpc_reg);
1155 temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS;
1165 temp = ehci_readl(ehci, status_reg);
1173 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1204 return ehci_readl(ehci, reg) & PORT_OWNER;
1211 u32 temp = ehci_readl(ehci, status_reg) & ~PORT_RWC_BITS;