Lines Matching refs:ep
174 #define PCH_UDC_CSR(ep) (UDC_CSR_ADDR + ep*4)
181 #define UDC_EPIN_IDX(ep) (ep * 2)
182 #define UDC_EPOUT_IDX(ep) (ep * 2 + 1)
270 * @ep: embedded ep request
276 * @offset_addr: offset address of ep register
277 * @desc: for this ep
285 struct usb_ep ep;
320 * @ep: array of endpoints
343 struct pch_udc_ep ep[PCH_UDC_EP_NUM];
381 * @req: embedded ep request
426 static inline u32 pch_udc_ep_readl(struct pch_udc_ep *ep, unsigned long reg)
428 return ioread32(ep->dev->base_addr + ep->offset_addr + reg);
431 static inline void pch_udc_ep_writel(struct pch_udc_ep *ep,
434 iowrite32(val, ep->dev->base_addr + ep->offset_addr + reg);
437 static inline void pch_udc_ep_bit_set(struct pch_udc_ep *ep,
441 pch_udc_ep_writel(ep, pch_udc_ep_readl(ep, reg) | bitmask, reg);
444 static inline void pch_udc_ep_bit_clr(struct pch_udc_ep *ep,
448 pch_udc_ep_writel(ep, pch_udc_ep_readl(ep, reg) & ~(bitmask), reg);
471 * @ep: end-point number
474 unsigned int ep)
476 unsigned long reg = PCH_UDC_CSR(ep);
486 * @ep: end-point number
490 static u32 pch_udc_read_csr(struct pch_udc_dev *dev, unsigned int ep)
492 unsigned long reg = PCH_UDC_CSR(ep);
617 * @ep: Reference to structure of type pch_udc_ep_regs
619 static void pch_udc_ep_set_stall(struct pch_udc_ep *ep)
621 if (ep->in) {
622 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_F);
623 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_S);
625 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_S);
631 * @ep: Reference to structure of type pch_udc_ep_regs
633 static inline void pch_udc_ep_clear_stall(struct pch_udc_ep *ep)
636 pch_udc_ep_bit_clr(ep, UDC_EPCTL_ADDR, UDC_EPCTL_S);
638 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_CNAK);
643 * @ep: Reference to structure of type pch_udc_ep_regs
646 static inline void pch_udc_ep_set_trfr_type(struct pch_udc_ep *ep,
649 pch_udc_ep_writel(ep, ((type << UDC_EPCTL_ET_SHIFT) &
655 * @ep: Reference to structure of type pch_udc_ep_regs
659 static void pch_udc_ep_set_bufsz(struct pch_udc_ep *ep,
664 data = pch_udc_ep_readl(ep, UDC_BUFIN_FRAMENUM_ADDR);
666 pch_udc_ep_writel(ep, data, UDC_BUFIN_FRAMENUM_ADDR);
668 data = pch_udc_ep_readl(ep, UDC_BUFOUT_MAXPKT_ADDR);
670 pch_udc_ep_writel(ep, data, UDC_BUFOUT_MAXPKT_ADDR);
676 * @ep: Reference to structure of type pch_udc_ep_regs
679 static void pch_udc_ep_set_maxpkt(struct pch_udc_ep *ep, u32 pkt_size)
681 u32 data = pch_udc_ep_readl(ep, UDC_BUFOUT_MAXPKT_ADDR);
683 pch_udc_ep_writel(ep, data, UDC_BUFOUT_MAXPKT_ADDR);
688 * @ep: Reference to structure of type pch_udc_ep_regs
691 static inline void pch_udc_ep_set_subptr(struct pch_udc_ep *ep, u32 addr)
693 pch_udc_ep_writel(ep, addr, UDC_SUBPTR_ADDR);
698 * @ep: Reference to structure of type pch_udc_ep_regs
701 static inline void pch_udc_ep_set_ddptr(struct pch_udc_ep *ep, u32 addr)
703 pch_udc_ep_writel(ep, addr, UDC_DESPTR_ADDR);
708 * @ep: Reference to structure of type pch_udc_ep_regs
710 static inline void pch_udc_ep_set_pd(struct pch_udc_ep *ep)
712 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_P);
717 * @ep: Reference to structure of type pch_udc_ep_regs
719 static inline void pch_udc_ep_set_rrdy(struct pch_udc_ep *ep)
721 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_RRDY);
726 * @ep: Reference to structure of type pch_udc_ep_regs
728 static inline void pch_udc_ep_clear_rrdy(struct pch_udc_ep *ep)
730 pch_udc_ep_bit_clr(ep, UDC_EPCTL_ADDR, UDC_EPCTL_RRDY);
873 * @ep: Reference to structure of type pch_udc_ep_regs
876 static inline u32 pch_udc_read_ep_control(struct pch_udc_ep *ep)
878 return pch_udc_ep_readl(ep, UDC_EPCTL_ADDR);
883 * @ep: Reference to structure of type pch_udc_ep_regs
886 static inline void pch_udc_clear_ep_control(struct pch_udc_ep *ep)
888 return pch_udc_ep_writel(ep, 0, UDC_EPCTL_ADDR);
893 * @ep: Reference to structure of type pch_udc_ep_regs
896 static inline u32 pch_udc_read_ep_status(struct pch_udc_ep *ep)
898 return pch_udc_ep_readl(ep, UDC_EPSTS_ADDR);
903 * @ep: Reference to structure of type pch_udc_ep_regs
906 static inline void pch_udc_clear_ep_status(struct pch_udc_ep *ep,
909 return pch_udc_ep_writel(ep, stat, UDC_EPSTS_ADDR);
915 * @ep: Reference to structure of type pch_udc_ep_regs
917 static inline void pch_udc_ep_set_nak(struct pch_udc_ep *ep)
919 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_SNAK);
925 * @ep: reference to structure of type pch_udc_ep_regs
927 static void pch_udc_ep_clear_nak(struct pch_udc_ep *ep)
930 struct pch_udc_dev *dev = ep->dev;
932 if (!(pch_udc_ep_readl(ep, UDC_EPCTL_ADDR) & UDC_EPCTL_NAK))
934 if (!ep->in) {
936 while (!(pch_udc_read_ep_status(ep) & UDC_EPSTS_MRXFIFO_EMP) &&
944 while ((pch_udc_read_ep_control(ep) & UDC_EPCTL_NAK) && --loopcnt) {
945 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_CNAK);
949 dev_err(&dev->pdev->dev, "%s: Clear NAK not set for ep%d%s\n",
950 __func__, ep->num, (ep->in ? "in" : "out"));
955 * @ep: reference to structure of type pch_udc_ep_regs
960 static void pch_udc_ep_fifo_flush(struct pch_udc_ep *ep, int dir)
962 if (dir) { /* IN ep */
963 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_F);
970 * @ep: reference to structure of type pch_udc_ep_regs
974 static void pch_udc_ep_enable(struct pch_udc_ep *ep,
981 pch_udc_ep_set_trfr_type(ep, desc->bmAttributes);
982 if (ep->in)
986 pch_udc_ep_set_bufsz(ep, buff_size, ep->in);
987 pch_udc_ep_set_maxpkt(ep, usb_endpoint_maxp(desc));
988 pch_udc_ep_set_nak(ep);
989 pch_udc_ep_fifo_flush(ep, ep->in);
991 val = ep->num << UDC_CSR_NE_NUM_SHIFT | ep->in << UDC_CSR_NE_DIR_SHIFT |
999 if (ep->in)
1000 pch_udc_write_csr(ep->dev, val, UDC_EPIN_IDX(ep->num));
1002 pch_udc_write_csr(ep->dev, val, UDC_EPOUT_IDX(ep->num));
1007 * @ep: reference to structure of type pch_udc_ep_regs
1009 static void pch_udc_ep_disable(struct pch_udc_ep *ep)
1011 if (ep->in) {
1013 pch_udc_ep_writel(ep, UDC_EPCTL_F, UDC_EPCTL_ADDR);
1015 pch_udc_ep_writel(ep, UDC_EPCTL_SNAK, UDC_EPCTL_ADDR);
1016 pch_udc_ep_bit_set(ep, UDC_EPSTS_ADDR, UDC_EPSTS_IN);
1019 pch_udc_ep_writel(ep, UDC_EPCTL_SNAK, UDC_EPCTL_ADDR);
1022 pch_udc_ep_writel(ep, 0, UDC_DESPTR_ADDR);
1027 * @ep: reference to structure of type pch_udc_ep_regs
1029 static void pch_udc_wait_ep_stall(struct pch_udc_ep *ep)
1034 while ((pch_udc_read_ep_control(ep) & UDC_EPCTL_S) && --count)
1037 dev_err(&ep->dev->pdev->dev, "%s: wait error\n", __func__);
1061 /* mask and clear all ep interrupts */
1087 /* mask all ep interrupts */
1418 * @ep: Reference to the endpoint structure
1422 static void complete_req(struct pch_udc_ep *ep, struct pch_udc_request *req,
1428 unsigned halted = ep->halted;
1438 dev = ep->dev;
1439 usb_gadget_unmap_request(&dev->gadget, &req->req, ep->in);
1440 ep->halted = 1;
1442 if (!ep->in)
1443 pch_udc_ep_clear_rrdy(ep);
1444 usb_gadget_giveback_request(&ep->ep, &req->req);
1446 ep->halted = halted;
1451 * @ep: Reference to the endpoint structure
1453 static void empty_req_queue(struct pch_udc_ep *ep)
1457 ep->halted = 1;
1458 while (!list_empty(&ep->queue)) {
1459 req = list_entry(ep->queue.next, struct pch_udc_request, queue);
1460 complete_req(ep, req, -ESHUTDOWN); /* Remove from list */
1495 * @ep: Reference to the endpoint structure
1504 static int pch_udc_create_dma_chain(struct pch_udc_ep *ep,
1515 pch_udc_free_dma_chain(ep->dev, req);
1525 td = dma_pool_alloc(ep->dev->data_requests, gfp_flags,
1543 pch_udc_free_dma_chain(ep->dev, req);
1552 * @ep: Reference to the endpoint structure
1560 static int prepare_dma(struct pch_udc_ep *ep, struct pch_udc_request *req,
1566 retval = pch_udc_create_dma_chain(ep, req, ep->ep.maxpacket, gfp);
1571 if (ep->in)
1580 * @ep: Reference to the endpoint structure
1583 static void process_zlp(struct pch_udc_ep *ep, struct pch_udc_request *req)
1585 struct pch_udc_dev *dev = ep->dev;
1588 complete_req(ep, req, 0);
1599 pch_udc_ep_clear_nak(&(dev->ep[UDC_EP0IN_IDX]));
1606 * @ep: Reference to the endpoint structure
1609 static void pch_udc_start_rxrequest(struct pch_udc_ep *ep,
1614 pch_udc_clear_dma(ep->dev, DMA_DIR_RX);
1625 pch_udc_ep_set_ddptr(ep, req->td_data_phys);
1627 pch_udc_enable_ep_interrupts(ep->dev, UDC_EPINT_OUT_EP0 << ep->num);
1628 pch_udc_set_dma(ep->dev, DMA_DIR_RX);
1629 pch_udc_ep_clear_nak(ep);
1630 pch_udc_ep_set_rrdy(ep);
1647 struct pch_udc_ep *ep;
1655 ep = container_of(usbep, struct pch_udc_ep, ep);
1656 dev = ep->dev;
1660 ep->ep.desc = desc;
1661 ep->halted = 0;
1662 pch_udc_ep_enable(ep, &ep->dev->cfg_data, desc);
1663 ep->ep.maxpacket = usb_endpoint_maxp(desc);
1664 pch_udc_enable_ep_interrupts(ep->dev, PCH_UDC_EPINT(ep->in, ep->num));
1680 struct pch_udc_ep *ep;
1686 ep = container_of(usbep, struct pch_udc_ep, ep);
1687 if ((usbep->name == ep0_string) || !ep->ep.desc)
1690 spin_lock_irqsave(&ep->dev->lock, iflags);
1691 empty_req_queue(ep);
1692 ep->halted = 1;
1693 pch_udc_ep_disable(ep);
1694 pch_udc_disable_ep_interrupts(ep->dev, PCH_UDC_EPINT(ep->in, ep->num));
1695 ep->ep.desc = NULL;
1696 INIT_LIST_HEAD(&ep->queue);
1697 spin_unlock_irqrestore(&ep->dev->lock, iflags);
1715 struct pch_udc_ep *ep;
1720 ep = container_of(usbep, struct pch_udc_ep, ep);
1726 if (!ep->dev->dma_addr)
1729 dma_desc = dma_pool_alloc(ep->dev->data_requests, gfp,
1753 struct pch_udc_ep *ep;
1759 ep = container_of(usbep, struct pch_udc_ep, ep);
1761 dev = ep->dev;
1767 pch_udc_free_dma_chain(ep->dev, req);
1768 dma_pool_free(ep->dev->data_requests, req->td_data,
1789 struct pch_udc_ep *ep;
1796 ep = container_of(usbep, struct pch_udc_ep, ep);
1797 dev = ep->dev;
1798 if (!ep->ep.desc && ep->num)
1807 retval = usb_gadget_map_request(&dev->gadget, usbreq, ep->in);
1811 retval = prepare_dma(ep, req, GFP_ATOMIC);
1818 if (list_empty(&ep->queue) && !ep->halted) {
1821 process_zlp(ep, req);
1825 if (!ep->in) {
1826 pch_udc_start_rxrequest(ep, req);
1833 pch_udc_wait_ep_stall(ep);
1834 pch_udc_ep_clear_nak(ep);
1835 pch_udc_enable_ep_interrupts(ep->dev, (1 << ep->num));
1838 /* Now add this request to the ep's pending requests */
1840 list_add_tail(&req->queue, &ep->queue);
1860 struct pch_udc_ep *ep;
1865 ep = container_of(usbep, struct pch_udc_ep, ep);
1866 if (!usbep || !usbreq || (!ep->ep.desc && ep->num))
1869 spin_lock_irqsave(&ep->dev->lock, flags);
1871 list_for_each_entry(req, &ep->queue, queue) {
1873 pch_udc_ep_set_nak(ep);
1875 complete_req(ep, req, -ECONNRESET);
1880 spin_unlock_irqrestore(&ep->dev->lock, flags);
1896 struct pch_udc_ep *ep;
1902 ep = container_of(usbep, struct pch_udc_ep, ep);
1903 if (!ep->ep.desc && !ep->num)
1905 if (!ep->dev->driver || (ep->dev->gadget.speed == USB_SPEED_UNKNOWN))
1908 if (list_empty(&ep->queue)) {
1910 if (ep->num == PCH_UDC_EP0)
1911 ep->dev->stall = 1;
1912 pch_udc_ep_set_stall(ep);
1914 ep->dev, PCH_UDC_EPINT(ep->in, ep->num));
1916 pch_udc_ep_clear_stall(ep);
1937 struct pch_udc_ep *ep;
1943 ep = container_of(usbep, struct pch_udc_ep, ep);
1944 if (!ep->ep.desc && !ep->num)
1946 if (!ep->dev->driver || (ep->dev->gadget.speed == USB_SPEED_UNKNOWN))
1949 if (!list_empty(&ep->queue)) {
1952 if (ep->num == PCH_UDC_EP0)
1953 ep->dev->stall = 1;
1954 pch_udc_ep_set_stall(ep);
1955 pch_udc_enable_ep_interrupts(ep->dev,
1956 PCH_UDC_EPINT(ep->in, ep->num));
1957 ep->dev->prot_stall = 1;
1970 struct pch_udc_ep *ep;
1975 ep = container_of(usbep, struct pch_udc_ep, ep);
1976 if (ep->ep.desc || !ep->num)
1977 pch_udc_ep_fifo_flush(ep, ep->in);
2011 * @ep: Reference to the endpoint structure
2013 static void pch_udc_start_next_txrequest(struct pch_udc_ep *ep)
2018 if (pch_udc_read_ep_control(ep) & UDC_EPCTL_P)
2021 if (list_empty(&ep->queue))
2025 req = list_entry(ep->queue.next, struct pch_udc_request, queue);
2030 pch_udc_wait_ep_stall(ep);
2032 pch_udc_ep_set_ddptr(ep, 0);
2041 pch_udc_ep_set_ddptr(ep, req->td_data_phys);
2042 pch_udc_set_dma(ep->dev, DMA_DIR_TX);
2043 pch_udc_ep_set_pd(ep);
2044 pch_udc_enable_ep_interrupts(ep->dev, PCH_UDC_EPINT(ep->in, ep->num));
2045 pch_udc_ep_clear_nak(ep);
2050 * @ep: Reference to the endpoint structure
2052 static void pch_udc_complete_transfer(struct pch_udc_ep *ep)
2055 struct pch_udc_dev *dev = ep->dev;
2057 if (list_empty(&ep->queue))
2059 req = list_entry(ep->queue.next, struct pch_udc_request, queue);
2068 (int)(ep->epsts));
2075 complete_req(ep, req, 0);
2077 if (!list_empty(&ep->queue)) {
2078 pch_udc_wait_ep_stall(ep);
2079 pch_udc_ep_clear_nak(ep);
2080 pch_udc_enable_ep_interrupts(ep->dev,
2081 PCH_UDC_EPINT(ep->in, ep->num));
2083 pch_udc_disable_ep_interrupts(ep->dev,
2084 PCH_UDC_EPINT(ep->in, ep->num));
2090 * @ep: Reference to the endpoint structure
2092 static void pch_udc_complete_receiver(struct pch_udc_ep *ep)
2095 struct pch_udc_dev *dev = ep->dev;
2100 if (list_empty(&ep->queue))
2103 req = list_entry(ep->queue.next, struct pch_udc_request, queue);
2104 pch_udc_clear_dma(ep->dev, DMA_DIR_RX);
2105 pch_udc_ep_set_ddptr(ep, 0);
2117 (int)(ep->epsts));
2140 complete_req(ep, req, 0);
2142 if (!list_empty(&ep->queue)) {
2143 req = list_entry(ep->queue.next, struct pch_udc_request, queue);
2144 pch_udc_start_rxrequest(ep, req);
2157 struct pch_udc_ep *ep;
2159 ep = &dev->ep[UDC_EPIN_IDX(ep_num)];
2160 epsts = ep->epsts;
2161 ep->epsts = 0;
2172 pch_udc_ep_set_stall(ep);
2173 pch_udc_enable_ep_interrupts(ep->dev,
2174 PCH_UDC_EPINT(ep->in, ep->num));
2178 pch_udc_ep_clear_stall(ep);
2180 pch_udc_ep_set_stall(ep);
2181 pch_udc_enable_ep_interrupts(ep->dev,
2182 PCH_UDC_EPINT(ep->in, ep->num));
2186 pch_udc_complete_transfer(ep);
2190 pch_udc_start_next_txrequest(ep);
2201 struct pch_udc_ep *ep;
2204 ep = &dev->ep[UDC_EPOUT_IDX(ep_num)];
2205 epsts = ep->epsts;
2206 ep->epsts = 0;
2208 if ((epsts & UDC_EPSTS_BNA) && (!list_empty(&ep->queue))) {
2210 req = list_entry(ep->queue.next, struct pch_udc_request,
2215 pch_udc_start_rxrequest(ep, req);
2222 pch_udc_ep_set_stall(ep);
2223 pch_udc_enable_ep_interrupts(ep->dev,
2224 PCH_UDC_EPINT(ep->in, ep->num));
2228 pch_udc_ep_clear_stall(ep);
2230 pch_udc_ep_set_stall(ep);
2231 pch_udc_enable_ep_interrupts(ep->dev,
2232 PCH_UDC_EPINT(ep->in, ep->num));
2237 if (ep->dev->prot_stall == 1) {
2238 pch_udc_ep_set_stall(ep);
2239 pch_udc_enable_ep_interrupts(ep->dev,
2240 PCH_UDC_EPINT(ep->in, ep->num));
2242 pch_udc_complete_receiver(ep);
2245 if (list_empty(&ep->queue))
2271 struct pch_udc_ep *ep;
2274 ep = &dev->ep[UDC_EP0IN_IDX];
2275 ep_out = &dev->ep[UDC_EP0OUT_IDX];
2276 epsts = ep->epsts;
2277 ep->epsts = 0;
2288 pch_udc_complete_transfer(ep);
2300 pch_udc_start_next_txrequest(ep);
2314 struct pch_udc_ep *ep;
2316 ep = &dev->ep[UDC_EP0OUT_IDX];
2317 stat = ep->epsts;
2318 ep->epsts = 0;
2324 dev->ep[UDC_EP0IN_IDX].halted = 0;
2325 dev->ep[UDC_EP0OUT_IDX].halted = 0;
2326 dev->setup_data = ep->td_stp->request;
2327 pch_udc_init_setup_buff(ep->td_stp);
2329 pch_udc_ep_fifo_flush(&(dev->ep[UDC_EP0IN_IDX]),
2330 dev->ep[UDC_EP0IN_IDX].in);
2332 dev->gadget.ep0 = &dev->ep[UDC_EP0IN_IDX].ep;
2334 dev->gadget.ep0 = &ep->ep;
2343 ep->td_data->status = (ep->td_data->status &
2346 pch_udc_ep_set_ddptr(ep, ep->td_data_phys);
2351 pch_udc_ep_clear_nak(&(dev->ep[UDC_EP0IN_IDX]));
2356 pch_udc_ep_clear_nak(ep);
2360 pch_udc_ep_set_stall(&(dev->ep[UDC_EP0IN_IDX]));
2361 pch_udc_enable_ep_interrupts(ep->dev,
2362 PCH_UDC_EPINT(ep->in, ep->num));
2371 pch_udc_ep_set_ddptr(ep, 0);
2372 if (!list_empty(&ep->queue)) {
2373 ep->epsts = stat;
2378 pch_udc_ep_set_rrdy(ep);
2390 struct pch_udc_ep *ep = &dev->ep[UDC_EPIN_IDX(ep_num)];
2391 if (list_empty(&ep->queue))
2393 pch_udc_enable_ep_interrupts(ep->dev, PCH_UDC_EPINT(ep->in, ep->num));
2394 pch_udc_ep_clear_nak(ep);
2405 struct pch_udc_ep *ep;
2410 ep = &dev->ep[UDC_EPIN_IDX(i)];
2411 ep->epsts = pch_udc_read_ep_status(ep);
2412 pch_udc_clear_ep_status(ep, ep->epsts);
2416 ep = &dev->ep[UDC_EPOUT_IDX(i)];
2417 ep->epsts = pch_udc_read_ep_status(ep);
2418 pch_udc_clear_ep_status(ep, ep->epsts);
2430 struct pch_udc_ep *ep;
2434 ep = &dev->ep[UDC_EP0IN_IDX];
2435 pch_udc_clear_ep_control(ep);
2436 pch_udc_ep_fifo_flush(ep, ep->in);
2437 pch_udc_ep_set_bufsz(ep, UDC_EP0IN_BUFF_SIZE, ep->in);
2438 pch_udc_ep_set_maxpkt(ep, UDC_EP0IN_MAX_PKT_SIZE);
2440 ep->td_data = NULL;
2441 ep->td_stp = NULL;
2442 ep->td_data_phys = 0;
2443 ep->td_stp_phys = 0;
2446 ep = &dev->ep[UDC_EP0OUT_IDX];
2447 pch_udc_clear_ep_control(ep);
2448 pch_udc_ep_fifo_flush(ep, ep->in);
2449 pch_udc_ep_set_bufsz(ep, UDC_EP0OUT_BUFF_SIZE, ep->in);
2450 pch_udc_ep_set_maxpkt(ep, UDC_EP0OUT_MAX_PKT_SIZE);
2452 pch_udc_write_csr(ep->dev, val, UDC_EP0OUT_IDX);
2455 pch_udc_init_setup_buff(ep->td_stp);
2457 pch_udc_ep_set_subptr(ep, ep->td_stp_phys);
2459 pch_udc_ep_set_ddptr(ep, ep->td_data_phys);
2462 ep->td_data->status = PCH_UDC_DMA_LAST;
2463 ep->td_data->dataptr = dev->dma_addr;
2464 ep->td_data->next = ep->td_data_phys;
2466 pch_udc_ep_clear_nak(ep);
2476 struct pch_udc_ep *ep;
2487 ep = &dev->ep[i];
2488 pch_udc_clear_ep_status(ep, UDC_EPSTS_ALL_CLR_MASK);
2489 pch_udc_clear_ep_control(ep);
2490 pch_udc_ep_set_ddptr(ep, 0);
2491 pch_udc_write_csr(ep->dev, 0x00, i);
2498 /* disable ep to empty req queue. Skip the control EP's */
2500 ep = &dev->ep[i];
2501 pch_udc_ep_set_nak(ep);
2502 pch_udc_ep_fifo_flush(ep, ep->in);
2504 empty_req_queue(ep);
2544 pch_udc_ep_set_rrdy(&(dev->ep[UDC_EP0OUT_IDX]));
2584 pch_udc_ep_clear_stall(&(dev->ep[i]));
2585 dev->ep[i].halted = 0;
2617 pch_udc_ep_clear_stall(&(dev->ep[i]));
2618 dev->ep[i].halted = 0;
2714 /* Clear ep interrupts */
2784 memset(dev->ep, 0, sizeof dev->ep);
2786 struct pch_udc_ep *ep = &dev->ep[i];
2787 ep->dev = dev;
2788 ep->halted = 1;
2789 ep->num = i / 2;
2790 ep->in = ~i & 1;
2791 ep->ep.name = ep_string[i];
2792 ep->ep.ops = &pch_udc_ep_ops;
2793 if (ep->in) {
2794 ep->offset_addr = ep->num * UDC_EP_REG_SHIFT;
2795 ep->ep.caps.dir_in = true;
2797 ep->offset_addr = (UDC_EPINT_OUT_SHIFT + ep->num) *
2799 ep->ep.caps.dir_out = true;
2802 ep->ep.caps.type_control = true;
2804 ep->ep.caps.type_iso = true;
2805 ep->ep.caps.type_bulk = true;
2806 ep->ep.caps.type_int = true;
2808 /* need to set ep->ep.maxpacket and set Default Configuration?*/
2809 usb_ep_set_maxpacket_limit(&ep->ep, UDC_BULK_MAX_PKT_SIZE);
2810 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
2811 INIT_LIST_HEAD(&ep->queue);
2813 usb_ep_set_maxpacket_limit(&dev->ep[UDC_EP0IN_IDX].ep, UDC_EP0IN_MAX_PKT_SIZE);
2814 usb_ep_set_maxpacket_limit(&dev->ep[UDC_EP0OUT_IDX].ep, UDC_EP0OUT_MAX_PKT_SIZE);
2817 list_del_init(&dev->ep[UDC_EP0IN_IDX].ep.ep_list);
2818 list_del_init(&dev->ep[UDC_EP0OUT_IDX].ep.ep_list);
2820 dev->gadget.ep0 = &dev->ep[UDC_EP0IN_IDX].ep;
2874 &dev->ep[UDC_EP0OUT_IDX].td_stp_phys);
2880 dev->ep[UDC_EP0OUT_IDX].td_stp = td_stp;
2884 &dev->ep[UDC_EP0OUT_IDX].td_data_phys);
2890 dev->ep[UDC_EP0OUT_IDX].td_data = td_data;
2891 dev->ep[UDC_EP0IN_IDX].td_stp = NULL;
2892 dev->ep[UDC_EP0IN_IDX].td_stp_phys = 0;
2893 dev->ep[UDC_EP0IN_IDX].td_data = NULL;
2894 dev->ep[UDC_EP0IN_IDX].td_data_phys = 0;
2998 if (dev->ep[UDC_EP0OUT_IDX].td_stp) {
3000 dev->ep[UDC_EP0OUT_IDX].td_stp,
3001 dev->ep[UDC_EP0OUT_IDX].td_stp_phys);
3003 if (dev->ep[UDC_EP0OUT_IDX].td_data) {
3005 dev->ep[UDC_EP0OUT_IDX].td_data,
3006 dev->ep[UDC_EP0OUT_IDX].td_data_phys);