Lines Matching refs:epctrl
59 /* Size of hardware buffer calculated from epctrl register value */
60 #define GR_BUFFER_SIZE(epctrl) \
61 ((((epctrl) & GR_EPCTRL_BUFSZ_MASK) >> GR_EPCTRL_BUFSZ_POS) * \
126 u32 epctrl = gr_read32(&ep->regs->epctrl);
128 int mode = (epctrl & GR_EPCTRL_TT_MASK) >> GR_EPCTRL_TT_POS;
133 seq_printf(seq, " halted: %d\n", !!(epctrl & GR_EPCTRL_EH));
134 seq_printf(seq, " disabled: %d\n", !!(epctrl & GR_EPCTRL_ED));
135 seq_printf(seq, " valid: %d\n", !!(epctrl & GR_EPCTRL_EV));
145 (epctrl & GR_EPCTRL_NT_MASK) >> GR_EPCTRL_NT_POS);
672 gr_write32(&ep->regs->epctrl, 0);
688 u32 epctrl;
690 epctrl = gr_read32(&dev->epo[0].regs->epctrl);
691 gr_write32(&dev->epo[0].regs->epctrl, epctrl | GR_EPCTRL_CS);
692 epctrl = gr_read32(&dev->epi[0].regs->epctrl);
693 gr_write32(&dev->epi[0].regs->epctrl, epctrl | GR_EPCTRL_CS);
705 u32 epctrl;
728 epctrl = gr_read32(&ep->regs->epctrl);
731 gr_write32(&ep->regs->epctrl, epctrl | GR_EPCTRL_EH);
736 gr_write32(&ep->regs->epctrl, epctrl & ~GR_EPCTRL_EH);
997 halted = gr_read32(&ep->regs->epctrl) & GR_EPCTRL_EH;
1474 u32 epctrl;
1490 epctrl = gr_read32(&ep->regs->epctrl);
1491 if (epctrl & GR_EPCTRL_EV)
1523 buffer_size = GR_BUFFER_SIZE(epctrl);
1581 epctrl = (max << GR_EPCTRL_MAXPL_POS)
1586 epctrl |= GR_EPCTRL_PI;
1587 gr_write32(&ep->regs->epctrl, epctrl);
1810 u32 epctrl;
1819 epctrl = gr_read32(&ep->regs->epctrl);
1820 epctrl |= GR_EPCTRL_CB;
1821 gr_write32(&ep->regs->epctrl, epctrl);
2070 gr_write32(&dev->epo[0].regs->epctrl, epctrl_val);
2071 gr_write32(&dev->epi[0].regs->epctrl, epctrl_val | GR_EPCTRL_PI);