Lines Matching defs:ep0
3 * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling
209 /* we share one TRB for ep0/1 */
862 struct dwc3_ep *ep0;
869 ep0 = dwc->eps[0];
873 trace_dwc3_complete_trb(ep0, trb);
875 r = next_request(&ep0->pending_list);
883 dwc3_gadget_giveback(ep0, r, -ECONNRESET);
894 if ((IS_ALIGNED(ur->length, ep0->endpoint.maxpacket) &&
898 trace_dwc3_complete_trb(ep0, trb);
911 dwc3_gadget_giveback(ep0, r, 0);
1109 * For status/DATA OUT stage, TRB will be queued on ep0 out
1111 * queuing ENDXFER command for ep0 out endpoint.