Lines Matching refs:attr
198 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
207 attr->tx_dif_p_nsec = 3200000;
483 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
486 UIC_ARG_MIB(CMN_PWM_CLK_CTRL), attr->cmn_pwm_clk_ctrl);
492 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
517 attr->cmn_pwm_clk_ctrl = clk_idx & PWM_CLK_CTRL_MASK;
534 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
538 exynos_ufs_calc_time_cntr(ufs, attr->tx_dif_p_nsec);
540 exynos_ufs_calc_time_cntr(ufs, attr->tx_dif_n_nsec);
542 exynos_ufs_calc_time_cntr(ufs, attr->tx_high_z_cnt_nsec);
544 exynos_ufs_calc_time_cntr(ufs, attr->tx_base_unit_nsec);
546 exynos_ufs_calc_time_cntr(ufs, attr->tx_gran_unit_nsec);
548 exynos_ufs_calc_time_cntr(ufs, attr->tx_sleep_cnt);
551 exynos_ufs_calc_time_cntr(ufs, attr->rx_dif_p_nsec);
553 exynos_ufs_calc_time_cntr(ufs, attr->rx_hibern8_wait_nsec);
555 exynos_ufs_calc_time_cntr(ufs, attr->rx_base_unit_nsec);
557 exynos_ufs_calc_time_cntr(ufs, attr->rx_gran_unit_nsec);
559 exynos_ufs_calc_time_cntr(ufs, attr->rx_sleep_cnt);
561 exynos_ufs_calc_time_cntr(ufs, attr->rx_stall_cnt);
621 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
629 attr->rx_hs_g1_sync_len_cap);
632 attr->rx_hs_g2_sync_len_cap);
635 attr->rx_hs_g3_sync_len_cap);
638 attr->rx_hs_g1_prep_sync_len_cap);
641 attr->rx_hs_g2_prep_sync_len_cap);
644 attr->rx_hs_g3_prep_sync_len_cap);
647 if (attr->rx_adv_fine_gran_sup_en == 0) {
652 if (attr->rx_min_actv_time_cap)
656 attr->rx_min_actv_time_cap);
658 if (attr->rx_hibern8_time_cap)
661 attr->rx_hibern8_time_cap);
663 } else if (attr->rx_adv_fine_gran_sup_en == 1) {
665 if (attr->rx_adv_fine_gran_step)
669 attr->rx_adv_fine_gran_step));
671 if (attr->rx_adv_min_actv_time_cap)
675 attr->rx_adv_min_actv_time_cap);
677 if (attr->rx_adv_hibern8_time_cap)
681 attr->rx_adv_hibern8_time_cap);
1017 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
1033 if (attr->pa_granularity) {
1036 attr->pa_granularity);
1039 if (attr->pa_tactivate)
1041 attr->pa_tactivate);
1042 if (attr->pa_hibern8time &&
1045 attr->pa_hibern8time);
1049 if (!attr->pa_granularity)
1051 &attr->pa_granularity);
1052 if (!attr->pa_hibern8time)
1054 &attr->pa_hibern8time);
1060 if (attr->pa_granularity < 1 || attr->pa_granularity > 6) {
1065 attr->pa_granularity);
1066 attr->pa_granularity = 6;
1081 struct exynos_ufs_uic_attr *attr;
1087 attr = ufs->drv_data->uic_attr;
1108 attr->rx_adv_fine_gran_sup_en = RX_ADV_FINE_GRAN_SUP_EN;
1109 attr->rx_adv_fine_gran_step = RX_ADV_FINE_GRAN_STEP_VAL;
1110 attr->rx_adv_min_actv_time_cap = RX_ADV_MIN_ACTV_TIME_CAP;
1111 attr->pa_granularity = PA_GRANULARITY_VAL;
1112 attr->pa_tactivate = PA_TACTIVATE_VAL;
1113 attr->pa_hibern8time = PA_HIBERN8TIME_VAL;
1234 struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
1245 int h8_time = attr->pa_hibern8time *
1246 granularity_tbl[attr->pa_granularity - 1];