Lines Matching refs:UIC_ARG_MIB
235 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40);
271 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0);
273 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0x0);
275 ufshcd_dme_set(hba, UIC_ARG_MIB(0xa011), 0x8000);
286 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), 12000);
287 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1), 32000);
288 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2), 16000);
325 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_TXPHY_CFGUPDT), 0x1);
327 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE), val | (1 << 12));
328 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_SKIP_RESET_PHY), 0x1);
329 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_SKIP_LINE_RESET), 0x1);
330 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_LINE_RESET_REQ), 0x1);
332 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE), val);
352 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_SAVECONFIGTIME), 0xbb8);
372 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_RXPHY_CFGUPDT), 0x1);
376 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), 0x1);
486 UIC_ARG_MIB(CMN_PWM_CLK_CTRL), attr->cmn_pwm_clk_ctrl);
512 ufshcd_dme_get(hba, UIC_ARG_MIB(CMN_PWM_CLK_CTRL), &clk_idx);
699 ufshcd_dme_set(hba, UIC_ARG_MIB(T_CONNECTIONSTATE), CPORT_IDLE);
702 ufshcd_dme_set(hba, UIC_ARG_MIB(N_DEVICEID), DEV_ID);
703 ufshcd_dme_set(hba, UIC_ARG_MIB(N_DEVICEID_VALID), true);
704 ufshcd_dme_set(hba, UIC_ARG_MIB(T_PEERDEVICEID), PEER_DEV_ID);
705 ufshcd_dme_set(hba, UIC_ARG_MIB(T_PEERCPORTID), PEER_CPORT_ID);
706 ufshcd_dme_set(hba, UIC_ARG_MIB(T_CPORTFLAGS), CPORT_DEF_FLAGS);
707 ufshcd_dme_set(hba, UIC_ARG_MIB(T_TRAFFICCLASS), TRAFFIC_CLASS);
708 ufshcd_dme_set(hba, UIC_ARG_MIB(T_CONNECTIONSTATE), CPORT_CONNECTED);
801 ufshcd_dme_set(hba, UIC_ARG_MIB(DL_FC0PROTTIMEOUTVAL), 8064);
802 ufshcd_dme_set(hba, UIC_ARG_MIB(DL_TC0REPLAYTIMEOUTVAL), 28224);
803 ufshcd_dme_set(hba, UIC_ARG_MIB(DL_AFC0REQTIMEOUTVAL), 20160);
894 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_AVAILRXDATALANES),
896 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_AVAILTXDATALANES),
927 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_CLK_PERIOD),
929 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTRAILINGCLOCKS),
931 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE),
1031 UIC_ARG_MIB(T_DBG_SKIP_INIT_HIBERN8_EXIT), true);
1035 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_GRANULARITY),
1040 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
1044 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
1050 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
1053 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
1058 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), 0);
1277 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &cur_mode);
1482 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_CLK_PERIOD),
1484 ufshcd_dme_set(hba, UIC_ARG_MIB(0x201), 0x12);
1485 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40);
1504 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0);
1505 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_AUTOMODE_THLD), 0x4E20);
1506 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE), 0x2e820183);
1507 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0x0);
1524 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
1526 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
1530 ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
1532 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), max_rx_hibern8_time_cap + 1);
1534 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), 0x01);
1535 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_SAVECONFIGTIME), 0xFA);
1536 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), 0x00);
1538 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40);
1547 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0);
1557 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), 0x1);
1558 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), 0x1);
1559 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), 12000);
1560 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1), 32000);
1561 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2), 16000);