Lines Matching defs:enable
26 * uncomment lines below to enable specific types of debug output
358 #define IOER 0x0c /* GPIO interrupt enable */
454 static int tx_enable(struct slgt_info *info, int enable);
456 static int rx_enable(struct slgt_info *info, int enable);
1468 /* enable network layer transmit */
2127 * 02 IRQ enable
2129 * 00 enable
2152 * 02 IRQ enable
2154 * 00 enable
2567 static int tx_enable(struct slgt_info *info, int enable)
2570 DBGINFO(("%s tx_enable(%d)\n", info->device_name, enable));
2572 if (enable) {
2596 static int rx_enable(struct slgt_info *info, int enable)
2600 DBGINFO(("%s rx_enable(%08x)\n", info->device_name, enable));
2603 * enable[31..16] = receive DMA buffer fill level
2607 rbuf_fill_level = ((unsigned int)enable) >> 16;
2622 * enable[1..0] = receiver enable command
2624 * 1 = enable
2625 * 2 = enable or force hunt mode if already enabled
2627 enable &= 3;
2628 if (enable) {
2631 else if (enable == 2) {
2682 /* enable hunt and idle irqs if needed */
2748 /* disable enable exit hunt mode/idle rcvd IRQs */
2834 * xctrl[16] 1 = enable terminal count, 0=disabled
2992 /* enable interrupts for watched pins */
3776 /* wait for enable bit cleared */
3789 /* wait for enable bit cleared */
3796 * enable internal loopback
3802 /* SCR (serial control) BIT2=loopback enable */
3809 * 01 auxclk enable (0 = disable)
3810 * 00 BRG enable (1 = enable)
3851 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3876 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3888 /* enable saving of rx status */
3898 /* enable rx DMA and DMA interrupt */
3901 /* enable saving of rx status, rx DMA and DMA interrupt */
3908 /* enable receiver */
3962 val = rd_reg16(info, TCR) & ~BIT1; /* clear enable bit */
4011 * 09 parity enable
4014 * 06 1=break enable
4022 * 01 enable
4023 * 00 auto-CTS enable
4055 * 09 parity enable
4065 * 01 enable
4066 * 00 auto-DCD enable
4105 * 13 tx data IRQ enable
4106 * 12 tx idle IRQ enable
4107 * 11 rx break on IRQ enable
4108 * 10 rx data IRQ enable
4109 * 09 rx break off IRQ enable
4110 * 08 overrun IRQ enable
4111 * 07 DSR IRQ enable
4112 * 06 CTS IRQ enable
4113 * 05 DCD IRQ enable
4114 * 04 RI IRQ enable
4116 * 02 1=txd->rxd internal loopback enable
4118 * 00 1=master IRQ enable
4158 * 09 CRC enable
4161 * 06 preamble enable
4165 * 01 enable
4166 * 00 auto-CTS enable
4236 * 09 CRC enable
4240 * 01 enable
4241 * 00 auto-DCD enable
4280 * 01 auxclk enable
4281 * 00 BRG enable
4341 * 13 tx data IRQ enable
4342 * 12 tx idle IRQ enable
4343 * 11 underrun IRQ enable
4344 * 10 rx data IRQ enable
4345 * 09 rx idle IRQ enable
4346 * 08 overrun IRQ enable
4347 * 07 DSR IRQ enable
4348 * 06 CTS IRQ enable
4349 * 05 DCD IRQ enable
4350 * 04 RI IRQ enable
4352 * 02 1=txd->rxd internal loopback enable
4354 * 00 1=master IRQ enable
4872 /* enable transmitter */