Lines Matching defs:vt8500_port
95 struct vt8500_port {
124 struct vt8500_port *vt8500_port = container_of(port,
125 struct vt8500_port,
128 vt8500_port->ier &= ~TX_FIFO_INTS;
129 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
134 struct vt8500_port *vt8500_port = container_of(port,
135 struct vt8500_port,
138 vt8500_port->ier &= ~RX_FIFO_INTS;
139 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
144 struct vt8500_port *vt8500_port = container_of(port,
145 struct vt8500_port,
148 vt8500_port->ier |= TCTS;
149 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
208 struct vt8500_port *vt8500_port = container_of(port,
209 struct vt8500_port,
212 vt8500_port->ier &= ~TX_FIFO_INTS;
213 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
215 vt8500_port->ier |= TX_FIFO_INTS;
216 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
281 struct vt8500_port *vt8500_port =
282 container_of(port, struct vt8500_port, uart);
286 div = ((vt8500_port->clk_predivisor - 1) & 0xf) << 16;
305 struct vt8500_port *vt8500_port =
306 container_of(port, struct vt8500_port, uart);
309 snprintf(vt8500_port->name, sizeof(vt8500_port->name),
313 vt8500_port->name, port);
324 struct vt8500_port *vt8500_port =
325 container_of(port, struct vt8500_port, uart);
327 vt8500_port->ier = 0;
330 vt8500_write(&vt8500_port->uart, 0, VT8500_URIER);
331 vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR);
339 struct vt8500_port *vt8500_port =
340 container_of(port, struct vt8500_port, uart);
354 lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR);
382 if (vt8500_port->vt8500_uart_flags & VT8500_HAS_SWRTSCTS_SWITCH)
386 vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR);
396 vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR);
397 while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc)
402 vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS;
407 if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag))
408 vt8500_port->ier |= TCTS;
410 vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR);
411 vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER);
418 struct vt8500_port *vt8500_port =
419 container_of(port, struct vt8500_port, uart);
420 return vt8500_port->name;
447 static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS];
475 struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index];
480 ier = vt8500_read(&vt8500_port->uart, VT8500_URIER);
481 vt8500_write(&vt8500_port->uart, VT8500_URIER, 0);
483 uart_console_write(&vt8500_port->uart, s, count,
490 wait_for_xmitr(&vt8500_port->uart);
491 vt8500_write(&vt8500_port->uart, VT8500_URIER, ier);
496 struct vt8500_port *vt8500_port;
505 vt8500_port = vt8500_uart_ports[co->index];
507 if (!vt8500_port)
513 return uart_set_options(&vt8500_port->uart,
602 struct vt8500_port *vt8500_port;
641 vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port),
643 if (!vt8500_port)
646 vt8500_port->uart.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &mmres);
647 if (IS_ERR(vt8500_port->uart.membase))
648 return PTR_ERR(vt8500_port->uart.membase);
650 vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);
651 if (IS_ERR(vt8500_port->clk)) {
656 ret = clk_prepare_enable(vt8500_port->clk);
662 vt8500_port->vt8500_uart_flags = *flags;
663 vt8500_port->clk_predivisor = DIV_ROUND_CLOSEST(
664 clk_get_rate(vt8500_port->clk),
667 vt8500_port->uart.type = PORT_VT8500;
668 vt8500_port->uart.iotype = UPIO_MEM;
669 vt8500_port->uart.mapbase = mmres->start;
670 vt8500_port->uart.irq = irq;
671 vt8500_port->uart.fifosize = 16;
672 vt8500_port->uart.ops = &vt8500_uart_pops;
673 vt8500_port->uart.line = port;
674 vt8500_port->uart.dev = &pdev->dev;
675 vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
676 vt8500_port->uart.has_sysrq = IS_ENABLED(CONFIG_SERIAL_VT8500_CONSOLE);
679 vt8500_port->uart.uartclk = 16 * clk_get_rate(vt8500_port->clk) /
680 vt8500_port->clk_predivisor /
683 snprintf(vt8500_port->name, sizeof(vt8500_port->name),
686 vt8500_uart_ports[port] = vt8500_port;
688 uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart);
690 platform_set_drvdata(pdev, vt8500_port);