Lines Matching defs:stm32port
638 struct stm32_port *stm32port = to_stm32_port(port);
641 stm32_usart_tx_dma_terminate(stm32port);
714 struct stm32_port *stm32port = to_stm32_port(port);
720 if (stm32_usart_tx_dma_started(stm32port)) {
721 ret = stm32_usart_tx_dma_resume(stm32port);
733 memcpy(&stm32port->tx_buf[0], &xmit->buf[xmit->tail], count);
742 memcpy(&stm32port->tx_buf[0], &xmit->buf[xmit->tail], one);
744 memcpy(&stm32port->tx_buf[one], &xmit->buf[0], two);
747 desc = dmaengine_prep_slave_single(stm32port->tx_ch,
748 stm32port->tx_dma_buf,
762 stm32port->tx_dma_busy = true;
772 stm32_usart_tx_dma_terminate(stm32port);
777 dma_async_issue_pending(stm32port->tx_ch);
1389 struct stm32_port *stm32port = container_of(port,
1391 const struct stm32_usart_offsets *ofs = &stm32port->info->ofs;
1392 const struct stm32_usart_config *cfg = &stm32port->info->cfg;
1496 static void stm32_usart_deinit_port(struct stm32_port *stm32port)
1498 clk_disable_unprepare(stm32port->clk);
1508 static int stm32_usart_init_port(struct stm32_port *stm32port,
1511 struct uart_port *port = &stm32port->port;
1523 port->fifosize = stm32port->info->cfg.fifosize;
1533 stm32port->wakeup_src = stm32port->info->cfg.has_wakeup &&
1536 stm32port->swap = stm32port->info->cfg.has_swap &&
1539 stm32port->fifoen = stm32port->info->cfg.has_fifo;
1540 if (stm32port->fifoen) {
1542 &stm32port->rxftcfg);
1544 &stm32port->txftcfg);
1554 stm32port->clk = devm_clk_get(&pdev->dev, NULL);
1555 if (IS_ERR(stm32port->clk))
1556 return PTR_ERR(stm32port->clk);
1559 ret = clk_prepare_enable(stm32port->clk);
1563 stm32port->port.uartclk = clk_get_rate(stm32port->clk);
1564 if (!stm32port->port.uartclk) {
1569 stm32port->gpios = mctrl_gpio_init(&stm32port->port, 0);
1570 if (IS_ERR(stm32port->gpios)) {
1571 ret = PTR_ERR(stm32port->gpios);
1579 if (stm32port->hw_flow_control) {
1580 if (mctrl_gpio_to_gpiod(stm32port->gpios, UART_GPIO_CTS) ||
1581 mctrl_gpio_to_gpiod(stm32port->gpios, UART_GPIO_RTS)) {
1591 clk_disable_unprepare(stm32port->clk);
1634 static void stm32_usart_of_dma_rx_remove(struct stm32_port *stm32port,
1637 if (stm32port->rx_buf)
1638 dma_free_coherent(&pdev->dev, RX_BUF_L, stm32port->rx_buf,
1639 stm32port->rx_dma_buf);
1642 static int stm32_usart_of_dma_rx_probe(struct stm32_port *stm32port,
1645 const struct stm32_usart_offsets *ofs = &stm32port->info->ofs;
1646 struct uart_port *port = &stm32port->port;
1651 stm32port->rx_buf = dma_alloc_coherent(dev, RX_BUF_L,
1652 &stm32port->rx_dma_buf,
1654 if (!stm32port->rx_buf)
1662 ret = dmaengine_slave_config(stm32port->rx_ch, &config);
1665 stm32_usart_of_dma_rx_remove(stm32port, pdev);
1672 static void stm32_usart_of_dma_tx_remove(struct stm32_port *stm32port,
1675 if (stm32port->tx_buf)
1676 dma_free_coherent(&pdev->dev, TX_BUF_L, stm32port->tx_buf,
1677 stm32port->tx_dma_buf);
1680 static int stm32_usart_of_dma_tx_probe(struct stm32_port *stm32port,
1683 const struct stm32_usart_offsets *ofs = &stm32port->info->ofs;
1684 struct uart_port *port = &stm32port->port;
1689 stm32port->tx_buf = dma_alloc_coherent(dev, TX_BUF_L,
1690 &stm32port->tx_dma_buf,
1692 if (!stm32port->tx_buf)
1700 ret = dmaengine_slave_config(stm32port->tx_ch, &config);
1703 stm32_usart_of_dma_tx_remove(stm32port, pdev);
1712 struct stm32_port *stm32port;
1715 stm32port = stm32_usart_of_get_port(pdev);
1716 if (!stm32port)
1719 stm32port->info = of_device_get_match_data(&pdev->dev);
1720 if (!stm32port->info)
1723 stm32port->rx_ch = dma_request_chan(&pdev->dev, "rx");
1724 if (PTR_ERR(stm32port->rx_ch) == -EPROBE_DEFER)
1728 if (IS_ERR(stm32port->rx_ch))
1729 stm32port->rx_ch = NULL;
1731 stm32port->tx_ch = dma_request_chan(&pdev->dev, "tx");
1732 if (PTR_ERR(stm32port->tx_ch) == -EPROBE_DEFER) {
1737 if (IS_ERR(stm32port->tx_ch))
1738 stm32port->tx_ch = NULL;
1740 ret = stm32_usart_init_port(stm32port, pdev);
1744 if (stm32port->wakeup_src) {
1746 ret = dev_pm_set_wake_irq(&pdev->dev, stm32port->port.irq);
1751 if (stm32port->rx_ch && stm32_usart_of_dma_rx_probe(stm32port, pdev)) {
1753 dma_release_channel(stm32port->rx_ch);
1754 stm32port->rx_ch = NULL;
1757 if (stm32port->tx_ch && stm32_usart_of_dma_tx_probe(stm32port, pdev)) {
1759 dma_release_channel(stm32port->tx_ch);
1760 stm32port->tx_ch = NULL;
1763 if (!stm32port->rx_ch)
1765 if (!stm32port->tx_ch)
1768 platform_set_drvdata(pdev, &stm32port->port);
1774 ret = uart_add_one_port(&stm32_usart_driver, &stm32port->port);
1787 if (stm32port->tx_ch)
1788 stm32_usart_of_dma_tx_remove(stm32port, pdev);
1789 if (stm32port->rx_ch)
1790 stm32_usart_of_dma_rx_remove(stm32port, pdev);
1792 if (stm32port->wakeup_src)
1796 if (stm32port->wakeup_src)
1799 stm32_usart_deinit_port(stm32port);
1802 if (stm32port->tx_ch)
1803 dma_release_channel(stm32port->tx_ch);
1806 if (stm32port->rx_ch)
1807 dma_release_channel(stm32port->rx_ch);
1906 struct stm32_port *stm32port;
1915 stm32port = &stm32_ports[co->index];
1923 if (stm32port->port.mapbase == 0 || !stm32port->port.membase)
1929 return uart_set_options(&stm32port->port, co, baud, parity, bits, flow);
2110 struct stm32_port *stm32port = container_of(port,
2113 clk_disable_unprepare(stm32port->clk);
2121 struct stm32_port *stm32port = container_of(port,
2124 return clk_prepare_enable(stm32port->clk);