Lines Matching refs:FIFO
122 /* SIFIVE_TX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */
125 /* SIFIVE_RX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */
129 #error Driver does not support configurations with different TX, RX FIFO sizes
251 * Read the transmit FIFO "full" bit, returning a non-zero value if the
252 * TX FIFO is full, or zero if space remains. Intended to be used to prevent
253 * writes to the TX FIFO when it's full.
255 * Returns: SIFIVE_SERIAL_TXDATA_FULL_MASK (non-zero) if the transmit FIFO
265 * __ssp_transmit_char() - enqueue a byte to transmit onto the TX FIFO
269 * Enqueue a byte @ch onto the transmit FIFO, given a pointer @ssp to the
281 * __ssp_transmit_chars() - enqueue multiple bytes onto the TX FIFO
284 * Transfer up to a TX FIFO size's worth of characters from the Linux serial
285 * transmit buffer to the SiFive UART TX FIFO.
303 * Enable interrupt generation when the transmit FIFO watermark is reached
319 * Enable interrupt generation when the receive FIFO watermark is reached
335 * Disable interrupt generation when the transmit FIFO watermark is reached
351 * Disable interrupt generation when the receive FIFO watermark is reached
366 * @is_empty: char pointer to return whether the RX FIFO is empty
368 * Try to read a byte from the SiFive UART RX FIFO, referenced by
369 * @ssp, and to return it. Also returns the RX FIFO empty bit in
373 * Returns: the byte read from the UART RX FIFO.
398 * Receive up to an RX FIFO's worth of bytes from the SiFive UART referred
481 * __ssp_wait_for_xmitr() - wait for an empty slot on the TX FIFO
484 * Delay while the UART TX FIFO referred to by @ssp is marked as full.
602 * left in the TX queue -- in other words, when the TX FIFO is
607 * On the cycle the TX FIFO goes empty there is still a full