Lines Matching refs:clk_rates
129 unsigned long clk_rates[SCI_NUM_CLKS];
542 sci_port->clk_rates[i] = clk_get_rate(sci_port->clks[i]);
544 sci_port->port.uartclk = sci_port->clk_rates[SCI_FCK];
2265 unsigned long freq = s->clk_rates[SCI_SCK];
2325 unsigned long freq = s->clk_rates[SCI_FCK];
2463 max_freq = max(max_freq, s->clk_rates[i]);
2475 if (s->clk_rates[SCI_SCK] && port->type != PORT_SCIFA &&
2490 if (s->clk_rates[SCI_SCIF_CLK] && sci_getreg(port, SCDL)->size) {
2491 err = sci_brg_calc(s, baud, s->clk_rates[SCI_SCIF_CLK], &dl1,
2506 if (s->clk_rates[SCI_BRG_INT] && sci_getreg(port, SCDL)->size) {
2507 err = sci_brg_calc(s, baud, s->clk_rates[SCI_BRG_INT], &dl1,