Lines Matching refs:up
158 static inline unsigned int sio_in(struct uart_port *up, int offset)
160 switch (up->iotype) {
162 return __raw_readl(up->membase + offset);
164 return inl(up->iobase + offset);
169 sio_out(struct uart_port *up, int offset, int value)
171 switch (up->iotype) {
173 __raw_writel(value, up->membase + offset);
176 outl(value, up->iobase + offset);
182 sio_mask(struct uart_port *up, int offset, unsigned int value)
184 sio_out(up, offset, sio_in(up, offset) & ~value);
187 sio_set(struct uart_port *up, int offset, unsigned int value)
189 sio_out(up, offset, sio_in(up, offset) | value);
193 sio_quot_set(struct uart_port *up, int quot)
197 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
199 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
201 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
203 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
205 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
208 static void serial_txx9_stop_tx(struct uart_port *up)
210 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
213 static void serial_txx9_start_tx(struct uart_port *up)
215 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
218 static void serial_txx9_stop_rx(struct uart_port *up)
220 up->read_status_mask &= ~TXX9_SIDISR_RDIS;
223 static void serial_txx9_initialize(struct uart_port *up)
227 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
231 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
234 sio_set(up, TXX9_SIFCR,
237 sio_out(up, TXX9_SILCR,
239 ((up->flags & UPF_TXX9_USE_SCLK) ?
241 sio_quot_set(up, uart_get_divisor(up, 9600));
242 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
243 sio_out(up, TXX9_SIDICR, 0);
247 receive_chars(struct uart_port *up, unsigned int *status)
255 ch = sio_in(up, TXX9_SIRFIFO);
257 up->icount.rx++;
261 up->ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
269 up->icount.brk++;
276 if (uart_handle_break(up))
279 up->icount.parity++;
281 up->icount.frame++;
283 up->icount.overrun++;
297 disr &= up->read_status_mask;
306 if (uart_handle_sysrq_char(up, ch))
309 uart_insert_char(up, disr, TXX9_SIDISR_UOER, ch, flag);
312 up->ignore_status_mask = next_ignore_status_mask;
313 disr = sio_in(up, TXX9_SIDISR);
316 tty_flip_buffer_push(&up->state->port);
321 static inline void transmit_chars(struct uart_port *up)
325 uart_port_tx_limited(up, ch, TXX9_SIO_TX_FIFO,
327 sio_out(up, TXX9_SITFIFO, ch),
334 struct uart_port *up = dev_id;
338 spin_lock(&up->lock);
339 status = sio_in(up, TXX9_SIDISR);
340 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
344 spin_unlock(&up->lock);
349 receive_chars(up, &status);
351 transmit_chars(up);
353 sio_mask(up, TXX9_SIDISR,
356 spin_unlock(&up->lock);
365 static unsigned int serial_txx9_tx_empty(struct uart_port *up)
370 spin_lock_irqsave(&up->lock, flags);
371 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
372 spin_unlock_irqrestore(&up->lock, flags);
377 static unsigned int serial_txx9_get_mctrl(struct uart_port *up)
383 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
384 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
389 static void serial_txx9_set_mctrl(struct uart_port *up, unsigned int mctrl)
393 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
395 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
398 static void serial_txx9_break_ctl(struct uart_port *up, int break_state)
402 spin_lock_irqsave(&up->lock, flags);
404 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
406 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
407 spin_unlock_irqrestore(&up->lock, flags);
414 static void wait_for_xmitr(struct uart_port *up)
418 /* Wait up to 10ms for the character(s) to be sent. */
420 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
423 /* Wait up to 1s for flow control if necessary */
424 if (up->flags & UPF_CONS_FLOW) {
427 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
439 static int serial_txx9_get_poll_char(struct uart_port *up)
447 ier = sio_in(up, TXX9_SIDICR);
448 sio_out(up, TXX9_SIDICR, 0);
450 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
453 c = sio_in(up, TXX9_SIRFIFO);
459 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
460 sio_out(up, TXX9_SIDICR, ier);
465 static void serial_txx9_put_poll_char(struct uart_port *up, unsigned char c)
472 ier = sio_in(up, TXX9_SIDICR);
473 sio_out(up, TXX9_SIDICR, 0);
475 wait_for_xmitr(up);
479 sio_out(up, TXX9_SITFIFO, c);
485 wait_for_xmitr(up);
486 sio_out(up, TXX9_SIDICR, ier);
491 static int serial_txx9_startup(struct uart_port *up)
500 sio_set(up, TXX9_SIFCR,
503 sio_mask(up, TXX9_SIFCR,
505 sio_out(up, TXX9_SIDICR, 0);
510 sio_out(up, TXX9_SIDISR, 0);
512 retval = request_irq(up->irq, serial_txx9_interrupt,
513 IRQF_SHARED, "serial_txx9", up);
520 spin_lock_irqsave(&up->lock, flags);
521 serial_txx9_set_mctrl(up, up->mctrl);
522 spin_unlock_irqrestore(&up->lock, flags);
525 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
530 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
535 static void serial_txx9_shutdown(struct uart_port *up)
542 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
544 spin_lock_irqsave(&up->lock, flags);
545 serial_txx9_set_mctrl(up, up->mctrl);
546 spin_unlock_irqrestore(&up->lock, flags);
551 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
554 if (up->cons && up->line == up->cons->index) {
555 free_irq(up->irq, up);
560 sio_set(up, TXX9_SIFCR,
563 sio_mask(up, TXX9_SIFCR,
567 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
569 free_irq(up->irq, up);
573 serial_txx9_set_termios(struct uart_port *up, struct ktermios *termios,
586 cval = sio_in(up, TXX9_SILCR);
617 baud = uart_get_baud_rate(up, termios, old, 0, up->uartclk/16/2);
618 quot = uart_get_divisor(up, baud);
620 /* Set up FIFOs */
628 spin_lock_irqsave(&up->lock, flags);
633 uart_update_timeout(up, termios->c_cflag, baud);
635 up->read_status_mask = TXX9_SIDISR_UOER |
638 up->read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
640 up->read_status_mask |= TXX9_SIDISR_UBRK;
645 up->ignore_status_mask = 0;
647 up->ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
649 up->ignore_status_mask |= TXX9_SIDISR_UBRK;
655 up->ignore_status_mask |= TXX9_SIDISR_UOER;
662 up->ignore_status_mask |= TXX9_SIDISR_RDIS;
666 (up->flags & UPF_TXX9_HAVE_CTS_LINE)) {
667 sio_set(up, TXX9_SIFLCR,
670 sio_mask(up, TXX9_SIFLCR,
674 sio_out(up, TXX9_SILCR, cval);
675 sio_quot_set(up, quot);
676 sio_out(up, TXX9_SIFCR, fcr);
678 serial_txx9_set_mctrl(up, up->mctrl);
679 spin_unlock_irqrestore(&up->lock, flags);
698 static int serial_txx9_request_resource(struct uart_port *up)
703 switch (up->iotype) {
705 if (!up->mapbase)
708 if (!request_mem_region(up->mapbase, size, "serial_txx9")) {
713 if (up->flags & UPF_IOREMAP) {
714 up->membase = ioremap(up->mapbase, size);
715 if (!up->membase) {
716 release_mem_region(up->mapbase, size);
723 if (!request_region(up->iobase, size, "serial_txx9"))
730 static void serial_txx9_release_resource(struct uart_port *up)
734 switch (up->iotype) {
736 if (!up->mapbase)
739 if (up->flags & UPF_IOREMAP) {
740 iounmap(up->membase);
741 up->membase = NULL;
744 release_mem_region(up->mapbase, size);
748 release_region(up->iobase, size);
753 static void serial_txx9_release_port(struct uart_port *up)
755 serial_txx9_release_resource(up);
758 static int serial_txx9_request_port(struct uart_port *up)
760 return serial_txx9_request_resource(up);
763 static void serial_txx9_config_port(struct uart_port *up, int uflags)
771 ret = serial_txx9_request_resource(up);
774 up->type = PORT_TXX9;
775 up->fifosize = TXX9_SIO_TX_FIFO;
778 if (up->line == up->cons->index)
781 serial_txx9_initialize(up);
820 struct uart_port *up = &serial_txx9_ports[i];
822 up->line = i;
823 up->ops = &serial_txx9_pops;
824 up->dev = dev;
825 if (up->iobase || up->mapbase)
826 uart_add_one_port(drv, up);
832 static void serial_txx9_console_putchar(struct uart_port *up, unsigned char ch)
834 wait_for_xmitr(up);
835 sio_out(up, TXX9_SITFIFO, ch);
847 struct uart_port *up = &serial_txx9_ports[co->index];
853 ier = sio_in(up, TXX9_SIDICR);
854 sio_out(up, TXX9_SIDICR, 0);
858 flcr = sio_in(up, TXX9_SIFLCR);
859 if (!(up->flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
860 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
862 uart_console_write(up, s, count, serial_txx9_console_putchar);
868 wait_for_xmitr(up);
869 sio_out(up, TXX9_SIFLCR, flcr);
870 sio_out(up, TXX9_SIDICR, ier);
875 struct uart_port *up;
888 up = &serial_txx9_ports[co->index];
889 if (!up->ops)
892 serial_txx9_initialize(up);
897 return uart_set_options(up, co, baud, parity, bits, flow);
1060 struct uart_port *up = &serial_txx9_ports[i];
1062 if (up->dev == &dev->dev)
1074 struct uart_port *up = &serial_txx9_ports[i];
1076 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1077 uart_suspend_port(&serial_txx9_reg, up);
1088 struct uart_port *up = &serial_txx9_ports[i];
1090 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1091 uart_resume_port(&serial_txx9_reg, up);
1147 struct uart_port *up = pci_get_drvdata(dev);
1149 if (up) {
1150 serial_txx9_unregister_port(up->line);
1158 struct uart_port *up = pci_get_drvdata(dev);
1160 if (up)
1161 uart_suspend_port(&serial_txx9_reg, up);
1169 struct uart_port *up = pci_get_drvdata(dev);
1173 if (up)
1174 uart_resume_port(&serial_txx9_reg, up);
1254 struct uart_port *up = &serial_txx9_ports[i];
1255 if (up->iobase || up->mapbase)
1256 uart_remove_one_port(&serial_txx9_reg, up);