Lines Matching refs:uart_clk
110 struct clk *uart_clk;
398 ret = clk_set_rate(tup->uart_clk, rate);
404 tup->configured_rate = clk_get_rate(tup->uart_clk);
410 rate = clk_get_rate(tup->uart_clk);
986 clk_disable_unprepare(tup->uart_clk);
999 ret = clk_prepare_enable(tup->uart_clk);
1051 clk_disable_unprepare(tup->uart_clk);
1073 clk_disable_unprepare(tup->uart_clk);
1238 /* tup->uart_clk is already enabled in tegra_uart_hw_init */
1239 clk_disable_unprepare(tup->uart_clk);
1289 struct clk *parent_clk = clk_get_parent(tup->uart_clk);
1590 tup->uart_clk = devm_clk_get(&pdev->dev, NULL);
1591 if (IS_ERR(tup->uart_clk))
1592 return dev_err_probe(&pdev->dev, PTR_ERR(tup->uart_clk), "Couldn't get the clock");