Lines Matching refs:port
325 struct uart_port port;
358 static void sc16is7xx_ier_set(struct uart_port *port, u8 bit);
359 static void sc16is7xx_stop_tx(struct uart_port *port);
364 static u8 sc16is7xx_port_read(struct uart_port *port, u8 reg)
366 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
374 static void sc16is7xx_port_write(struct uart_port *port, u8 reg, u8 val)
376 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
381 static void sc16is7xx_fifo_read(struct uart_port *port, unsigned int rxlen)
383 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
384 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
389 static void sc16is7xx_fifo_write(struct uart_port *port, u8 to_send)
391 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
392 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
404 static void sc16is7xx_port_update(struct uart_port *port, u8 reg,
407 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
412 static void sc16is7xx_power(struct uart_port *port, int on)
414 sc16is7xx_port_update(port, SC16IS7XX_IER_REG,
485 static int sc16is7xx_set_baud(struct uart_port *port, int baud)
487 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
490 unsigned long clk = port->uartclk, div = clk / 16 / baud;
512 lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG);
515 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
520 sc16is7xx_port_update(port, SC16IS7XX_EFR_REG,
527 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
531 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG,
536 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
541 sc16is7xx_port_write(port, SC16IS7XX_DLH_REG, div / 256);
542 sc16is7xx_port_write(port, SC16IS7XX_DLL_REG, div % 256);
546 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
551 static void sc16is7xx_handle_rx(struct uart_port *port, unsigned int rxlen,
554 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
560 dev_warn_ratelimited(port->dev,
562 port->line, rxlen);
563 port->icount.buf_overrun++;
571 lsr = sc16is7xx_port_read(port, SC16IS7XX_LSR_REG);
578 s->buf[0] = sc16is7xx_port_read(port, SC16IS7XX_RHR_REG);
581 sc16is7xx_fifo_read(port, rxlen);
587 port->icount.rx++;
592 port->icount.brk++;
593 if (uart_handle_break(port))
596 port->icount.parity++;
598 port->icount.frame++;
600 port->icount.overrun++;
602 lsr &= port->read_status_mask;
615 if (uart_handle_sysrq_char(port, ch))
618 if (lsr & port->ignore_status_mask)
621 uart_insert_char(port, lsr, SC16IS7XX_LSR_OE_BIT, ch,
627 tty_flip_buffer_push(&port->state->port);
630 static void sc16is7xx_handle_tx(struct uart_port *port)
632 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
633 struct circ_buf *xmit = &port->state->xmit;
637 if (unlikely(port->x_char)) {
638 sc16is7xx_port_write(port, SC16IS7XX_THR_REG, port->x_char);
639 port->icount.tx++;
640 port->x_char = 0;
644 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
645 uart_port_lock_irqsave(port, &flags);
646 sc16is7xx_stop_tx(port);
647 uart_port_unlock_irqrestore(port, flags);
655 txlen = sc16is7xx_port_read(port, SC16IS7XX_TXLVL_REG);
657 dev_err_ratelimited(port->dev,
667 uart_xmit_advance(port, 1);
670 sc16is7xx_fifo_write(port, to_send);
673 uart_port_lock_irqsave(port, &flags);
675 uart_write_wakeup(port);
678 sc16is7xx_stop_tx(port);
680 sc16is7xx_ier_set(port, SC16IS7XX_IER_THRI_BIT);
681 uart_port_unlock_irqrestore(port, flags);
684 static unsigned int sc16is7xx_get_hwmctrl(struct uart_port *port)
686 u8 msr = sc16is7xx_port_read(port, SC16IS7XX_MSR_REG);
698 struct uart_port *port = &one->port;
704 status = sc16is7xx_get_hwmctrl(port);
712 uart_port_lock_irqsave(port, &flags);
714 port->icount.rng++;
716 port->icount.dsr++;
718 uart_handle_dcd_change(port, status & TIOCM_CAR);
720 uart_handle_cts_change(port, status & TIOCM_CTS);
722 wake_up_interruptible(&port->state->port.delta_msr_wait);
723 uart_port_unlock_irqrestore(port, flags);
730 struct uart_port *port = &s->p[portno].port;
731 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
735 iir = sc16is7xx_port_read(port, SC16IS7XX_IIR_REG);
748 rxlen = sc16is7xx_port_read(port, SC16IS7XX_RXLVL_REG);
762 sc16is7xx_handle_rx(port, rxlen, iir);
770 sc16is7xx_handle_tx(port);
773 dev_err_ratelimited(port->dev,
775 port->line, iir);
805 struct uart_port *port = &(to_sc16is7xx_one(ws, tx_work)->port);
806 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
808 if ((port->rs485.flags & SER_RS485_ENABLED) &&
809 (port->rs485.delay_rts_before_send > 0))
810 msleep(port->rs485.delay_rts_before_send);
813 sc16is7xx_handle_tx(port);
817 static void sc16is7xx_reconf_rs485(struct uart_port *port)
822 struct serial_rs485 *rs485 = &port->rs485;
825 uart_port_lock_irqsave(port, &irqflags);
832 uart_port_unlock_irqrestore(port, irqflags);
834 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, mask, efcr);
843 uart_port_lock_irqsave(&one->port, &irqflags);
846 uart_port_unlock_irqrestore(&one->port, irqflags);
852 if (one->port.mctrl & TIOCM_RTS)
855 if (one->port.mctrl & TIOCM_DTR)
858 if (one->port.mctrl & TIOCM_LOOP)
860 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG,
868 sc16is7xx_port_update(&one->port, SC16IS7XX_IER_REG,
872 sc16is7xx_reconf_rs485(&one->port);
875 static void sc16is7xx_ier_clear(struct uart_port *port, u8 bit)
877 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
878 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
880 lockdep_assert_held_once(&port->lock);
888 static void sc16is7xx_ier_set(struct uart_port *port, u8 bit)
890 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
891 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
893 lockdep_assert_held_once(&port->lock);
901 static void sc16is7xx_stop_tx(struct uart_port *port)
903 sc16is7xx_ier_clear(port, SC16IS7XX_IER_THRI_BIT);
906 static void sc16is7xx_stop_rx(struct uart_port *port)
908 sc16is7xx_ier_clear(port, SC16IS7XX_IER_RDI_BIT);
914 struct sc16is7xx_port *s = dev_get_drvdata(one->port.dev);
916 if (one->port.state) {
925 static void sc16is7xx_enable_ms(struct uart_port *port)
927 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
928 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
930 lockdep_assert_held_once(&port->lock);
935 static void sc16is7xx_start_tx(struct uart_port *port)
937 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
938 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
943 static void sc16is7xx_throttle(struct uart_port *port)
952 uart_port_lock_irqsave(port, &flags);
953 sc16is7xx_ier_clear(port, SC16IS7XX_IER_RDI_BIT);
954 uart_port_unlock_irqrestore(port, flags);
957 static void sc16is7xx_unthrottle(struct uart_port *port)
961 uart_port_lock_irqsave(port, &flags);
962 sc16is7xx_ier_set(port, SC16IS7XX_IER_RDI_BIT);
963 uart_port_unlock_irqrestore(port, flags);
966 static unsigned int sc16is7xx_tx_empty(struct uart_port *port)
970 lsr = sc16is7xx_port_read(port, SC16IS7XX_LSR_REG);
975 static unsigned int sc16is7xx_get_mctrl(struct uart_port *port)
977 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
979 /* Called with port lock taken so we can only return cached value */
983 static void sc16is7xx_set_mctrl(struct uart_port *port, unsigned int mctrl)
985 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
986 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
992 static void sc16is7xx_break_ctl(struct uart_port *port, int break_state)
994 sc16is7xx_port_update(port, SC16IS7XX_LCR_REG,
999 static void sc16is7xx_set_termios(struct uart_port *port,
1003 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
1046 port->read_status_mask = SC16IS7XX_LSR_OE_BIT;
1048 port->read_status_mask |= SC16IS7XX_LSR_PE_BIT |
1051 port->read_status_mask |= SC16IS7XX_LSR_BI_BIT;
1054 port->ignore_status_mask = 0;
1056 port->ignore_status_mask |= SC16IS7XX_LSR_BI_BIT;
1058 port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK;
1063 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
1068 sc16is7xx_port_write(port, SC16IS7XX_XON1_REG, termios->c_cc[VSTART]);
1069 sc16is7xx_port_write(port, SC16IS7XX_XOFF1_REG, termios->c_cc[VSTOP]);
1071 port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS);
1075 port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS;
1082 sc16is7xx_port_update(port,
1089 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
1094 baud = uart_get_baud_rate(port, termios, old,
1095 port->uartclk / 16 / 4 / 0xffff,
1096 port->uartclk / 16);
1099 baud = sc16is7xx_set_baud(port, baud);
1101 uart_port_lock_irqsave(port, &flags);
1104 uart_update_timeout(port, termios->c_cflag, baud);
1106 if (UART_ENABLE_MS(port, termios->c_cflag))
1107 sc16is7xx_enable_ms(port);
1109 uart_port_unlock_irqrestore(port, flags);
1112 static int sc16is7xx_config_rs485(struct uart_port *port, struct ktermios *termios,
1115 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
1116 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
1134 static int sc16is7xx_startup(struct uart_port *port)
1136 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
1140 sc16is7xx_power(port, 1);
1144 sc16is7xx_port_write(port, SC16IS7XX_FCR_REG, val);
1146 sc16is7xx_port_write(port, SC16IS7XX_FCR_REG,
1150 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
1156 sc16is7xx_port_update(port, SC16IS7XX_EFR_REG,
1161 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG,
1167 sc16is7xx_port_write(port, SC16IS7XX_TCR_REG,
1174 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_WORD_LEN_8);
1178 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG,
1184 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG,
1192 sc16is7xx_port_write(port, SC16IS7XX_IER_REG, val);
1195 uart_port_lock_irqsave(port, &flags);
1196 sc16is7xx_enable_ms(port);
1197 uart_port_unlock_irqrestore(port, flags);
1202 static void sc16is7xx_shutdown(struct uart_port *port)
1204 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
1205 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
1210 sc16is7xx_port_write(port, SC16IS7XX_IER_REG, 0);
1212 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG,
1218 sc16is7xx_power(port, 0);
1223 static const char *sc16is7xx_type(struct uart_port *port)
1225 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
1227 return (port->type == PORT_SC16IS7XX) ? s->devtype->name : NULL;
1230 static int sc16is7xx_request_port(struct uart_port *port)
1236 static void sc16is7xx_config_port(struct uart_port *port, int flags)
1239 port->type = PORT_SC16IS7XX;
1242 static int sc16is7xx_verify_port(struct uart_port *port,
1247 if (s->irq != port->irq)
1253 static void sc16is7xx_pm(struct uart_port *port, unsigned int state,
1256 sc16is7xx_power(port, (state == UART_PM_STATE_ON) ? 1 : 0);
1259 static void sc16is7xx_null_void(struct uart_port *port)
1291 struct uart_port *port = &s->p[0].port;
1293 val = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG);
1301 struct uart_port *port = &s->p[0].port;
1303 sc16is7xx_port_update(port, SC16IS7XX_IOSTATE_REG, BIT(offset),
1311 struct uart_port *port = &s->p[0].port;
1313 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), 0);
1322 struct uart_port *port = &s->p[0].port;
1323 u8 state = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG);
1338 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset),
1340 sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state);
1358 struct device *dev = s->p[0].port.dev;
1406 struct device *dev = s->p[0].port.dev;
1470 /* Alloc port structure */
1473 dev_err(dev, "Error allocating port structure\n");
1517 s->p[i].port.line = find_first_zero_bit(&sc16is7xx_lines,
1519 if (s->p[i].port.line >= SC16IS7XX_MAX_DEVS) {
1524 /* Initialize port data */
1525 s->p[i].port.dev = dev;
1526 s->p[i].port.irq = irq;
1527 s->p[i].port.type = PORT_SC16IS7XX;
1528 s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE;
1529 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY;
1530 s->p[i].port.iobase = i;
1536 s->p[i].port.membase = (void __iomem *)~0;
1537 s->p[i].port.iotype = UPIO_PORT;
1538 s->p[i].port.uartclk = freq;
1539 s->p[i].port.rs485_config = sc16is7xx_config_rs485;
1540 s->p[i].port.rs485_supported = sc16is7xx_rs485_supported;
1541 s->p[i].port.ops = &sc16is7xx_ops;
1547 ret = uart_get_rs485_mode(&s->p[i].port);
1552 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0);
1554 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG,
1563 /* Register port */
1564 ret = uart_add_one_port(&sc16is7xx_uart, &s->p[i].port);
1568 set_bit(s->p[i].port.line, &sc16is7xx_lines);
1571 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG,
1577 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG,
1583 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00);
1586 sc16is7xx_power(&s->p[i].port, 0);
1636 if (test_and_clear_bit(s->p[i].port.line, &sc16is7xx_lines))
1637 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port);
1659 if (test_and_clear_bit(s->p[i].port.line, &sc16is7xx_lines))
1660 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port);
1661 sc16is7xx_power(&s->p[i].port, 0);