Lines Matching refs:tx_chan
108 struct dma_chan *tx_chan;
306 if (dma && dma->tx_chan && ourport->tx_in_progress == S3C24XX_TX_DMA) {
307 dmaengine_pause(dma->tx_chan);
308 dmaengine_tx_status(dma->tx_chan, dma->tx_cookie, &state);
309 dmaengine_terminate_all(dma->tx_chan);
310 dma_sync_single_for_cpu(dma->tx_chan->device->dev,
339 dmaengine_tx_status(dma->tx_chan, dma->tx_cookie, &state);
343 dma_sync_single_for_cpu(dma->tx_chan->device->dev,
447 dma_sync_single_for_device(dma->tx_chan->device->dev,
451 dma->tx_desc = dmaengine_prep_slave_single(dma->tx_chan,
465 dma_async_issue_pending(dma->tx_chan);
483 if (!ourport->dma || !ourport->dma->tx_chan ||
501 if (!ourport->dma || !ourport->dma->tx_chan)
505 if (ourport->dma && ourport->dma->tx_chan) {
563 dmaengine_pause(dma->tx_chan);
876 if (ourport->dma && ourport->dma->tx_chan &&
1085 dma->tx_chan = dma_request_chan(p->port.dev, "tx");
1086 if (IS_ERR(dma->tx_chan)) {
1088 ret = PTR_ERR(dma->tx_chan);
1092 ret = dma_get_slave_caps(dma->tx_chan, &dma_caps);
1100 dmaengine_slave_config(dma->tx_chan, &dma->tx_conf);
1120 dma->tx_addr = dma_map_single(dma->tx_chan->device->dev,
1123 if (dma_mapping_error(dma->tx_chan->device->dev, dma->tx_addr)) {
1137 dma_release_channel(dma->tx_chan);
1159 if (dma->tx_chan) {
1160 dmaengine_terminate_all(dma->tx_chan);
1161 dma_unmap_single(dma->tx_chan->device->dev, dma->tx_addr,
1163 dma_release_channel(dma->tx_chan);
1164 dma->tx_chan = NULL;