Lines Matching defs:ufcon
248 unsigned int ucon, ufcon;
256 ufcon = rd_regl(port, S3C2410_UFCON);
257 ufcon |= S3C2410_UFCON_RESETRX;
258 wr_regl(port, S3C2410_UFCON, ufcon);
390 u32 ucon, ufcon;
392 /* Set ufcon txtrig */
394 ufcon = rd_regl(port, S3C2410_UFCON);
395 wr_regl(port, S3C2410_UFCON, ufcon);
762 unsigned int ufcon, ufstat, uerstat;
793 ufcon = rd_regl(port, S3C2410_UFCON);
794 ufcon |= S3C2410_UFCON_RESETRX;
795 wr_regl(port, S3C2410_UFCON, ufcon);
987 unsigned long ufcon = rd_regl(port, S3C2410_UFCON);
989 if (ufcon & S3C2410_UFCON_FIFOMODE) {
1282 unsigned int ufcon;
1307 ufcon = rd_regl(port, S3C2410_UFCON);
1308 ufcon |= S3C2410_UFCON_RESETRX | S5PV210_UFCON_RXTRIG8;
1310 ufcon |= S3C2410_UFCON_RESETTX;
1311 wr_regl(port, S3C2410_UFCON, ufcon);
1327 unsigned int ufcon;
1345 ufcon = rd_regl(port, S3C2410_UFCON);
1346 ufcon |= S3C2410_UFCON_RESETRX | S5PV210_UFCON_RXTRIG8;
1348 ufcon |= S3C2410_UFCON_RESETTX;
1349 wr_regl(port, S3C2410_UFCON, ufcon);
1654 "uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n",
1858 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
1859 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
2293 s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon)
2298 if (ufcon & S3C2410_UFCON_FIFOMODE) {
2339 unsigned int ufcon = rd_regl(port, S3C2410_UFCON);
2346 while (!s3c24xx_serial_console_txrdy(port, ufcon))
2356 unsigned int ufcon = rd_regl(port, S3C2410_UFCON);
2358 while (!s3c24xx_serial_console_txrdy(port, ufcon))
2523 .ufcon = S3C2410_UFCON_DEFAULT,
2551 .ufcon = S5PV210_UFCON_DEFAULT,
2580 .ufcon = S5PV210_UFCON_DEFAULT, \
2630 .ufcon = S3C2410_UFCON_DEFAULT,
2659 .ufcon = S5PV210_UFCON_DEFAULT,