Lines Matching refs:sport
45 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
46 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
47 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
48 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
49 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
50 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
51 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
53 #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
54 #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
55 #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
56 #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
57 #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
58 #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
59 #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
84 static void sa1100_mctrl_check(struct sa1100_port *sport)
88 status = sport->port.ops->get_mctrl(&sport->port);
89 changed = status ^ sport->old_status;
94 sport->old_status = status;
97 sport->port.icount.rng++;
99 sport->port.icount.dsr++;
101 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
103 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
105 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
114 struct sa1100_port *sport = from_timer(sport, t, timer);
117 if (sport->port.state) {
118 spin_lock_irqsave(&sport->port.lock, flags);
119 sa1100_mctrl_check(sport);
120 spin_unlock_irqrestore(&sport->port.lock, flags);
122 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
131 struct sa1100_port *sport =
135 utcr3 = UART_GET_UTCR3(sport);
136 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
137 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
145 struct sa1100_port *sport =
149 utcr3 = UART_GET_UTCR3(sport);
150 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
151 UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
159 struct sa1100_port *sport =
163 utcr3 = UART_GET_UTCR3(sport);
164 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
172 struct sa1100_port *sport =
175 mod_timer(&sport->timer, jiffies);
177 mctrl_gpio_enable_ms(sport->gpios);
181 sa1100_rx_chars(struct sa1100_port *sport)
186 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
187 UTSR0_TO_SM(UART_GET_UTSR0(sport));
189 ch = UART_GET_CHAR(sport);
191 sport->port.icount.rx++;
201 sport->port.icount.parity++;
203 sport->port.icount.frame++;
205 sport->port.icount.overrun++;
207 status &= sport->port.read_status_mask;
214 sport->port.sysrq = 0;
217 if (uart_handle_sysrq_char(&sport->port, ch))
220 uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
223 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
224 UTSR0_TO_SM(UART_GET_UTSR0(sport));
227 tty_flip_buffer_push(&sport->port.state->port);
230 static void sa1100_tx_chars(struct sa1100_port *sport)
238 sa1100_mctrl_check(sport);
240 uart_port_tx(&sport->port, ch,
241 UART_GET_UTSR1(sport) & UTSR1_TNF,
242 UART_PUT_CHAR(sport, ch));
247 struct sa1100_port *sport = dev_id;
250 spin_lock(&sport->port.lock);
251 status = UART_GET_UTSR0(sport);
252 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
257 UART_PUT_UTSR0(sport, UTSR0_RID);
258 sa1100_rx_chars(sport);
263 UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
266 sport->port.icount.brk++;
269 uart_handle_break(&sport->port);
272 sa1100_tx_chars(sport);
275 status = UART_GET_UTSR0(sport);
276 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
279 spin_unlock(&sport->port.lock);
289 struct sa1100_port *sport =
292 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
297 struct sa1100_port *sport =
301 mctrl_gpio_get(sport->gpios, &ret);
308 struct sa1100_port *sport =
311 mctrl_gpio_set(sport->gpios, mctrl);
319 struct sa1100_port *sport =
324 spin_lock_irqsave(&sport->port.lock, flags);
325 utcr3 = UART_GET_UTCR3(sport);
330 UART_PUT_UTCR3(sport, utcr3);
331 spin_unlock_irqrestore(&sport->port.lock, flags);
336 struct sa1100_port *sport =
343 retval = request_irq(sport->port.irq, sa1100_int, 0,
344 "sa11x0-uart", sport);
351 UART_PUT_UTSR0(sport, -1);
352 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
357 spin_lock_irq(&sport->port.lock);
358 sa1100_enable_ms(&sport->port);
359 spin_unlock_irq(&sport->port.lock);
366 struct sa1100_port *sport =
372 del_timer_sync(&sport->timer);
377 free_irq(sport->port.irq, sport);
382 UART_PUT_UTCR3(sport, 0);
389 struct sa1100_port *sport =
424 del_timer_sync(&sport->timer);
426 spin_lock_irqsave(&sport->port.lock, flags);
428 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
429 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
431 sport->port.read_status_mask |=
434 sport->port.read_status_mask |=
440 sport->port.ignore_status_mask = 0;
442 sport->port.ignore_status_mask |=
445 sport->port.ignore_status_mask |=
452 sport->port.ignore_status_mask |=
464 old_utcr3 = UART_GET_UTCR3(sport);
465 UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
467 while (UART_GET_UTSR1(sport) & UTSR1_TBY)
471 UART_PUT_UTCR3(sport, 0);
474 UART_PUT_UTCR0(sport, utcr0);
478 UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
479 UART_PUT_UTCR2(sport, (quot & 0xff));
481 UART_PUT_UTSR0(sport, -1);
483 UART_PUT_UTCR3(sport, old_utcr3);
485 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
486 sa1100_enable_ms(&sport->port);
488 spin_unlock_irqrestore(&sport->port.lock, flags);
493 struct sa1100_port *sport =
496 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
504 struct sa1100_port *sport =
507 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
515 struct sa1100_port *sport =
518 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
527 struct sa1100_port *sport =
531 sa1100_request_port(&sport->port) == 0)
532 sport->port.type = PORT_SA1100;
543 struct sa1100_port *sport =
549 if (sport->port.irq != ser->irq)
553 if (sport->port.uartclk / 16 != ser->baud_base)
555 if ((void *)sport->port.mapbase != ser->iomem_base)
557 if (sport->port.iobase != ser->port)
675 struct sa1100_port *sport =
678 while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
680 UART_PUT_CHAR(sport, ch);
689 struct sa1100_port *sport = &sa1100_ports[co->index];
695 old_utcr3 = UART_GET_UTCR3(sport);
696 UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
699 uart_console_write(&sport->port, s, count, sa1100_console_putchar);
706 status = UART_GET_UTSR1(sport);
708 UART_PUT_UTCR3(sport, old_utcr3);
716 sa1100_console_get_options(struct sa1100_port *sport, int *baud,
721 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
726 utcr0 = UART_GET_UTCR0(sport);
741 quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
743 *baud = sport->port.uartclk / (16 * (quot + 1));
750 struct sa1100_port *sport;
763 sport = &sa1100_ports[co->index];
768 sa1100_console_get_options(sport, &baud, &parity, &bits);
770 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
809 struct sa1100_port *sport = platform_get_drvdata(dev);
811 if (sport)
812 uart_suspend_port(&sa1100_reg, &sport->port);
819 struct sa1100_port *sport = platform_get_drvdata(dev);
821 if (sport)
822 uart_resume_port(&sa1100_reg, &sport->port);
827 static int sa1100_serial_add_one_port(struct sa1100_port *sport, struct platform_device *dev)
829 sport->port.dev = &dev->dev;
830 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SA1100_CONSOLE);
835 sport->gpios = mctrl_gpio_init_noauto(sport->port.dev, 0);
836 if (IS_ERR(sport->gpios)) {
837 int err = PTR_ERR(sport->gpios);
839 dev_err(sport->port.dev, "failed to get mctrl gpios: %d\n",
845 sport->gpios = NULL;
848 platform_set_drvdata(dev, sport);
850 return uart_add_one_port(&sa1100_reg, &sport->port);
875 struct sa1100_port *sport = platform_get_drvdata(pdev);
877 if (sport)
878 uart_remove_one_port(&sa1100_reg, &sport->port);