Lines Matching refs:write_zsreg
124 write_zsreg(uap, R1,
128 write_zsreg(uap, R4, regs[R4]);
131 write_zsreg(uap, R10, regs[R10]);
134 write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
135 write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
138 write_zsreg(uap, R15, regs[R15] | EN85C30);
139 write_zsreg(uap, R7, regs[R7P]);
142 write_zsreg(uap, R15, regs[R15] & ~EN85C30);
145 write_zsreg(uap, R6, regs[R6]);
146 write_zsreg(uap, R7, regs[R7]);
149 write_zsreg(uap, R14, regs[R14] & ~BRENAB);
152 write_zsreg(uap, R11, regs[R11]);
155 write_zsreg(uap, R12, regs[R12]);
156 write_zsreg(uap, R13, regs[R13]);
159 write_zsreg(uap, R14, regs[R14]);
162 write_zsreg(uap, R0, RES_EXT_INT);
163 write_zsreg(uap, R0, RES_EXT_INT);
166 write_zsreg(uap, R3, regs[R3]);
167 write_zsreg(uap, R5, regs[R5]);
170 write_zsreg(uap, R1, regs[R1]);
173 write_zsreg(uap, R9, regs[R9]);
205 write_zsreg(uap, R1, uap->curregs[1]);
230 write_zsreg(uap, R0, ERR_RES);
320 write_zsreg(uap, R0, RES_EXT_INT);
421 write_zsreg(uap, R0, RES_Tx_P);
448 write_zsreg(uap_a, R0, RES_H_IUS);
473 write_zsreg(uap_b, R0, RES_H_IUS);
556 write_zsreg(uap, R5, uap->curregs[R5]);
667 write_zsreg(uap, R15, uap->curregs[R15]);
693 write_zsreg(uap, R5, uap->curregs[R5]);
767 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
770 write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);
773 write_zsreg(uap, 4, X1CLK | MONSYNC);
774 write_zsreg(uap, 3, Rx8);
775 write_zsreg(uap, 5, Tx8 | RTS);
776 write_zsreg(uap, 9, NV); /* Didn't we already do this? */
777 write_zsreg(uap, 11, RCBR | TCBR);
778 write_zsreg(uap, 12, 0);
779 write_zsreg(uap, 13, 0);
780 write_zsreg(uap, 14, (LOOPBAK | BRSRC));
781 write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB));
782 write_zsreg(uap, 3, Rx8 | RxENABLE);
783 write_zsreg(uap, 0, RES_EXT_INT);
784 write_zsreg(uap, 0, RES_EXT_INT);
785 write_zsreg(uap, 0, RES_EXT_INT); /* to kill some time */
792 write_zsreg(uap, 9, NV);
793 write_zsreg(uap, 4, X16CLK | SB_MASK);
794 write_zsreg(uap, 3, Rx8);
798 write_zsreg(uap, 0, RES_EXT_INT);
799 write_zsreg(uap, 0, ERR_RES);
823 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
826 write_zsreg(uap, 9, 0);
830 write_zsreg(uap, R1, 0);
831 write_zsreg(uap, R0, ERR_RES);
832 write_zsreg(uap, R0, ERR_RES);
833 write_zsreg(uap, R0, RES_H_IUS);
834 write_zsreg(uap, R0, RES_H_IUS);
855 write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
856 write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);
870 write_zsreg(uap, R5, uap->curregs[R5]);
877 write_zsreg(uap, R5, uap->curregs[R5]);
1143 write_zsreg(uap, R5, uap->curregs[R5]);
1193 write_zsreg(uap, R5, uap->curregs[R5]);
1902 write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);
1903 write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);
1908 write_zsreg(uap, R1, uap->curregs[1]);