Lines Matching defs:uart_clock
1059 #define to_uart_clock_base(uart_clock) container_of(uart_clock, \
1060 struct mvebu_uart_clock_base, clocks[uart_clock->clock_idx])
1064 struct mvebu_uart_clock *uart_clock = to_uart_clock(hw);
1066 to_uart_clock_base(uart_clock);
1172 struct mvebu_uart_clock *uart_clock = to_uart_clock(hw);
1174 to_uart_clock_base(uart_clock);
1182 if (uart_clock->clock_idx == 0)
1196 struct mvebu_uart_clock *uart_clock = to_uart_clock(hw);
1198 to_uart_clock_base(uart_clock);
1206 if (uart_clock->clock_idx == 0)
1218 struct mvebu_uart_clock *uart_clock = to_uart_clock(hw);
1220 to_uart_clock_base(uart_clock);
1225 if (uart_clock->clock_idx == 0)
1233 struct mvebu_uart_clock *uart_clock = to_uart_clock(hw);
1235 to_uart_clock_base(uart_clock);
1239 uart_clock->pm_context_reg1 = readl(uart_clock_base->reg1);
1240 uart_clock->pm_context_reg2 = readl(uart_clock_base->reg2);
1248 struct mvebu_uart_clock *uart_clock = to_uart_clock(hw);
1250 to_uart_clock_base(uart_clock);
1254 writel(uart_clock->pm_context_reg1, uart_clock_base->reg1);
1255 writel(uart_clock->pm_context_reg2, uart_clock_base->reg2);
1262 struct mvebu_uart_clock *uart_clock = to_uart_clock(hw);
1264 to_uart_clock_base(uart_clock);
1272 struct mvebu_uart_clock *uart_clock = to_uart_clock(hw);
1274 to_uart_clock_base(uart_clock);
1304 struct mvebu_uart_clock *uart_clock,
1310 uart_clock->clk_hw.init = &init;
1318 return devm_clk_hw_register(dev, &uart_clock->clk_hw);