Lines Matching defs:uart
172 struct uart_port uart;
186 return container_of(up, struct msm_port, uart);
277 msm_stop_dma(&msm_port->uart, dma);
285 msm_stop_dma(&msm_port->uart, dma);
295 struct device *dev = msm_port->uart.dev;
343 struct device *dev = msm_port->uart.dev;
439 struct uart_port *port = &msm_port->uart;
484 struct circ_buf *xmit = &msm_port->uart.state->xmit;
485 struct uart_port *port = &msm_port->uart;
545 struct uart_port *port = &msm_port->uart;
608 struct uart_port *uart = &msm_port->uart;
618 dma->phys = dma_map_single(uart->dev, dma->virt,
620 ret = dma_mapping_error(uart->dev, dma->phys);
650 msm_write(uart, msm_port->imr, MSM_UART_IMR);
656 msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
657 msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
659 val = msm_read(uart, UARTDM_DMEN);
663 msm_write(uart, val, UARTDM_DMEN);
665 msm_write(uart, UARTDM_RX_SIZE, UARTDM_DMRX);
668 msm_write(uart, val, UARTDM_DMEN);
672 dma_unmap_single(uart->dev, dma->phys, UARTDM_RX_SIZE, dma->dir);
679 msm_write(uart, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);
680 msm_write(uart, MSM_UART_CR_RX_ENABLE, MSM_UART_CR);
682 msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
683 msm_write(uart, 0xFFFFFF, UARTDM_DMRX);
684 msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
688 msm_write(uart, msm_port->imr, MSM_UART_IMR);
885 struct circ_buf *xmit = &msm_port->uart.state->xmit;
1225 msm_request_tx_dma(msm_port, msm_port->uart.mapbase);
1226 msm_request_rx_dma(msm_port, msm_port->uart.mapbase);
1561 .uart = {
1570 .uart = {
1579 .uart = {
1593 return &msm_uart_ports[line].uart;
1726 OF_EARLYCON_DECLARE(msm_serial, "qcom,msm-uart",
1856 { .compatible = "qcom,msm-uart" },
1866 uart_suspend_port(&msm_uart_driver, &port->uart);
1875 uart_resume_port(&msm_uart_driver, &port->uart);