Lines Matching defs:psc
62 * psc->mpc52xx_psc_imr
124 static inline void mpc52xx_set_divisor(struct mpc52xx_psc __iomem *psc,
128 out_be16(&psc->mpc52xx_psc_clock_select, prescaler);
129 out_8(&psc->ctur, divisor >> 8);
130 out_8(&psc->ctlr, divisor & 0xff);
165 struct mpc52xx_psc __iomem *psc = PSC(port);
168 in_8(&psc->mpc52xx_psc_ipcr);
170 out_8(&psc->mpc52xx_psc_acr, MPC52xx_PSC_IEC_CTS | MPC52xx_PSC_IEC_DCD);
173 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
196 struct mpc52xx_psc __iomem *psc = PSC(port);
205 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
576 "fsl,mpc5121-psc-fifo");
872 static inline void mpc5125_set_divisor(struct mpc5125_psc __iomem *psc,
876 out_8(&psc->mpc52xx_psc_clock_select, prescaler);
877 out_8(&psc->ctur, divisor >> 8);
878 out_8(&psc->ctlr, divisor & 0xff);
938 struct mpc5125_psc __iomem *psc = PSC_5125(port);
941 in_8(&psc->mpc52xx_psc_ipcr);
943 out_8(&psc->mpc52xx_psc_acr, MPC52xx_PSC_IEC_CTS | MPC52xx_PSC_IEC_DCD);
946 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
1620 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
1685 { .compatible = "fsl,mpc5200b-psc-uart", .data = &mpc5200b_psc_ops, },
1686 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1688 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1693 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
1694 { .compatible = "fsl,mpc5125-psc-uart", .data = &mpc5125_psc_ops, },
1716 /* set the uart clock to the input clock of the psc, the different
1756 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1855 .name = "mpc52xx-psc-uart",