Lines Matching refs:port
89 static void meson_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
93 static unsigned int meson_uart_get_mctrl(struct uart_port *port)
98 static unsigned int meson_uart_tx_empty(struct uart_port *port)
102 val = readl(port->membase + AML_UART_STATUS);
107 static void meson_uart_stop_tx(struct uart_port *port)
111 val = readl(port->membase + AML_UART_CONTROL);
113 writel(val, port->membase + AML_UART_CONTROL);
116 static void meson_uart_stop_rx(struct uart_port *port)
120 val = readl(port->membase + AML_UART_CONTROL);
122 writel(val, port->membase + AML_UART_CONTROL);
125 static void meson_uart_shutdown(struct uart_port *port)
130 free_irq(port->irq, port);
132 spin_lock_irqsave(&port->lock, flags);
134 val = readl(port->membase + AML_UART_CONTROL);
137 writel(val, port->membase + AML_UART_CONTROL);
139 spin_unlock_irqrestore(&port->lock, flags);
142 static void meson_uart_start_tx(struct uart_port *port)
144 struct circ_buf *xmit = &port->state->xmit;
148 if (uart_tx_stopped(port)) {
149 meson_uart_stop_tx(port);
153 while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) {
154 if (port->x_char) {
155 writel(port->x_char, port->membase + AML_UART_WFIFO);
156 port->icount.tx++;
157 port->x_char = 0;
165 writel(ch, port->membase + AML_UART_WFIFO);
166 uart_xmit_advance(port, 1);
170 val = readl(port->membase + AML_UART_CONTROL);
172 writel(val, port->membase + AML_UART_CONTROL);
176 uart_write_wakeup(port);
179 static void meson_receive_chars(struct uart_port *port)
181 struct tty_port *tport = &port->state->port;
187 port->icount.rx++;
188 ostatus = status = readl(port->membase + AML_UART_STATUS);
192 port->icount.overrun++;
194 port->icount.frame++;
196 port->icount.frame++;
198 mode = readl(port->membase + AML_UART_CONTROL);
200 writel(mode, port->membase + AML_UART_CONTROL);
204 writel(mode, port->membase + AML_UART_CONTROL);
206 status &= port->read_status_mask;
213 ch = readl(port->membase + AML_UART_RFIFO);
217 port->icount.brk++;
219 if (uart_handle_break(port))
223 if (uart_handle_sysrq_char(port, ch))
226 if ((status & port->ignore_status_mask) == 0)
232 } while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY));
239 struct uart_port *port = (struct uart_port *)dev_id;
241 spin_lock(&port->lock);
243 if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY))
244 meson_receive_chars(port);
246 if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) {
247 if (readl(port->membase + AML_UART_CONTROL) & AML_UART_TX_INT_EN)
248 meson_uart_start_tx(port);
251 spin_unlock(&port->lock);
256 static const char *meson_uart_type(struct uart_port *port)
258 return (port->type == PORT_MESON) ? "meson_uart" : NULL;
265 * console on this port at this time. Hence it is not necessary for this
266 * function to acquire the port->lock. (Since there is no console on this
267 * port at this time, the port->lock is not initialized yet.)
269 static void meson_uart_reset(struct uart_port *port)
273 val = readl(port->membase + AML_UART_CONTROL);
275 writel(val, port->membase + AML_UART_CONTROL);
278 writel(val, port->membase + AML_UART_CONTROL);
281 static int meson_uart_startup(struct uart_port *port)
287 spin_lock_irqsave(&port->lock, flags);
289 val = readl(port->membase + AML_UART_CONTROL);
291 writel(val, port->membase + AML_UART_CONTROL);
293 writel(val, port->membase + AML_UART_CONTROL);
296 writel(val, port->membase + AML_UART_CONTROL);
299 writel(val, port->membase + AML_UART_CONTROL);
301 val = (AML_UART_RECV_IRQ(1) | AML_UART_XMIT_IRQ(port->fifosize / 2));
302 writel(val, port->membase + AML_UART_MISC);
304 spin_unlock_irqrestore(&port->lock, flags);
306 ret = request_irq(port->irq, meson_uart_interrupt, 0,
307 port->name, port);
312 static void meson_uart_change_speed(struct uart_port *port, unsigned long baud)
314 const struct meson_uart_data *private_data = port->private_data;
317 while (!meson_uart_tx_empty(port))
320 if (port->uartclk == 24000000) {
327 val |= DIV_ROUND_CLOSEST(port->uartclk / xtal_div, baud) - 1;
330 val = DIV_ROUND_CLOSEST(port->uartclk / 4, baud) - 1;
333 writel(val, port->membase + AML_UART_REG5);
336 static void meson_uart_set_termios(struct uart_port *port,
344 spin_lock_irqsave(&port->lock, flags);
349 val = readl(port->membase + AML_UART_CONTROL);
384 if (port->flags & UPF_HARD_FLOW)
392 writel(val, port->membase + AML_UART_CONTROL);
394 baud = uart_get_baud_rate(port, termios, old, 50, 4000000);
395 meson_uart_change_speed(port, baud);
397 port->read_status_mask = AML_UART_TX_FIFO_WERR;
399 port->read_status_mask |= AML_UART_PARITY_ERR |
402 port->ignore_status_mask = 0;
404 port->ignore_status_mask |= AML_UART_PARITY_ERR |
407 uart_update_timeout(port, termios->c_cflag, baud);
408 spin_unlock_irqrestore(&port->lock, flags);
411 static int meson_uart_verify_port(struct uart_port *port,
416 if (port->type != PORT_MESON)
418 if (port->irq != ser->irq)
425 static void meson_uart_release_port(struct uart_port *port)
427 devm_iounmap(port->dev, port->membase);
428 port->membase = NULL;
429 devm_release_mem_region(port->dev, port->mapbase, port->mapsize);
432 static int meson_uart_request_port(struct uart_port *port)
434 if (!devm_request_mem_region(port->dev, port->mapbase, port->mapsize,
435 dev_name(port->dev))) {
436 dev_err(port->dev, "Memory region busy\n");
440 port->membase = devm_ioremap(port->dev, port->mapbase,
441 port->mapsize);
442 if (!port->membase)
448 static void meson_uart_config_port(struct uart_port *port, int flags)
451 port->type = PORT_MESON;
452 meson_uart_request_port(port);
462 static int meson_uart_poll_get_char(struct uart_port *port)
467 spin_lock_irqsave(&port->lock, flags);
469 if (readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY)
472 c = readl(port->membase + AML_UART_RFIFO);
474 spin_unlock_irqrestore(&port->lock, flags);
479 static void meson_uart_poll_put_char(struct uart_port *port, unsigned char c)
485 spin_lock_irqsave(&port->lock, flags);
488 ret = readl_poll_timeout_atomic(port->membase + AML_UART_STATUS, reg,
493 dev_err(port->dev, "Timeout waiting for UART TX EMPTY\n");
498 writel(c, port->membase + AML_UART_WFIFO);
501 ret = readl_poll_timeout_atomic(port->membase + AML_UART_STATUS, reg,
506 dev_err(port->dev, "Timeout waiting for UART TX EMPTY\n");
509 spin_unlock_irqrestore(&port->lock, flags);
536 static void meson_uart_enable_tx_engine(struct uart_port *port)
540 val = readl(port->membase + AML_UART_CONTROL);
542 writel(val, port->membase + AML_UART_CONTROL);
545 static void meson_console_putchar(struct uart_port *port, unsigned char ch)
547 if (!port->membase)
550 while (readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)
552 writel(ch, port->membase + AML_UART_WFIFO);
555 static void meson_serial_port_write(struct uart_port *port, const char *s,
563 if (port->sysrq) {
566 locked = spin_trylock(&port->lock);
568 spin_lock(&port->lock);
572 val = readl(port->membase + AML_UART_CONTROL);
574 writel(tmp, port->membase + AML_UART_CONTROL);
576 uart_console_write(port, s, count, meson_console_putchar);
577 writel(val, port->membase + AML_UART_CONTROL);
580 spin_unlock(&port->lock);
587 struct uart_port *port;
589 port = meson_ports[co->index];
590 if (!port)
593 meson_serial_port_write(port, s, count);
598 struct uart_port *port;
607 port = meson_ports[co->index];
608 if (!port || !port->membase)
611 meson_uart_enable_tx_engine(port);
616 return uart_set_options(port, co, baud, parity, bits, flow);
639 meson_serial_port_write(&dev->port, s, count);
645 if (!device->port.membase)
648 meson_uart_enable_tx_engine(&device->port);
674 struct uart_port *port)
692 port->uartclk = clk_get_rate(clk_baud);
708 struct uart_port *port;
744 "port %d already allocated\n", pdev->id);
747 port = devm_kzalloc(&pdev->dev, sizeof(struct uart_port), GFP_KERNEL);
748 if (!port)
751 ret = meson_uart_probe_clocks(pdev, port);
766 port->iotype = UPIO_MEM;
767 port->mapbase = res_mem->start;
768 port->mapsize = resource_size(res_mem);
769 port->irq = irq;
770 port->flags = UPF_BOOT_AUTOCONF | UPF_LOW_LATENCY;
772 port->flags |= UPF_HARD_FLOW;
773 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MESON_CONSOLE);
774 port->dev = &pdev->dev;
775 port->line = pdev->id;
776 port->type = PORT_MESON;
777 port->x_char = 0;
778 port->ops = &meson_uart_ops;
779 port->fifosize = fifosize;
780 port->private_data = (void *)priv_data;
782 meson_ports[pdev->id] = port;
783 platform_set_drvdata(pdev, port);
785 /* reset port before registering (and possibly registering console) */
786 if (meson_uart_request_port(port) >= 0) {
787 meson_uart_reset(port);
788 meson_uart_release_port(port);
791 ret = uart_add_one_port(uart_driver, port);
801 struct uart_port *port;
803 port = platform_get_drvdata(pdev);
804 uart_driver = meson_uart_current(port->private_data);
805 uart_remove_one_port(uart_driver, port);
865 MODULE_DESCRIPTION("Amlogic Meson serial port driver");