Lines Matching refs:one
312 struct max310x_one *one = to_max310x_port(port);
315 regmap_read(one->regmap, reg, &val);
322 struct max310x_one *one = to_max310x_port(port);
324 regmap_write(one->regmap, reg, val);
329 struct max310x_one *one = to_max310x_port(port);
331 regmap_update_bits(one->regmap, reg, mask, val);
673 struct max310x_one *one = to_max310x_port(port);
675 regmap_noinc_write(one->regmap, MAX310X_THR_REG, txbuf, len);
680 struct max310x_one *one = to_max310x_port(port);
682 regmap_noinc_read(one->regmap, MAX310X_RHR_REG, rxbuf, len);
687 struct max310x_one *one = to_max310x_port(port);
704 max310x_batch_read(port, one->rx_buf, rxlen);
716 uart_insert_char(port, sts, 0, one->rx_buf[i], flag);
724 one->rx_buf[rxlen-1], flag);
806 * We could do that in one SPI transaction, but meh. */
821 struct max310x_one *one = to_max310x_port(port);
823 schedule_work(&one->tx_work);
881 struct max310x_one *one = container_of(ws, struct max310x_one, tx_work);
883 max310x_handle_tx(&one->port);
903 struct max310x_one *one = container_of(ws, struct max310x_one, md_work);
905 max310x_port_update(&one->port, MAX310X_MODE2_REG,
907 (one->port.mctrl & TIOCM_LOOP) ?
913 struct max310x_one *one = to_max310x_port(port);
915 schedule_work(&one->md_work);
1037 struct max310x_one *one = container_of(ws, struct max310x_one, rs_work);
1040 delay = (one->port.rs485.delay_rts_before_send << 4) |
1041 one->port.rs485.delay_rts_after_send;
1042 max310x_port_write(&one->port, MAX310X_HDPIXDELAY_REG, delay);
1044 if (one->port.rs485.flags & SER_RS485_ENABLED) {
1047 if (!(one->port.rs485.flags & SER_RS485_RX_DURING_TX))
1051 max310x_port_update(&one->port, MAX310X_MODE1_REG,
1053 max310x_port_update(&one->port, MAX310X_MODE2_REG,
1060 struct max310x_one *one = to_max310x_port(port);
1068 schedule_work(&one->rs_work);